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ORCIDISLPED 2016: San Francisco Airport, CA, USA
- Proceedings of the 2016 International Symposium on Low Power Electronics and Design, ISLPED 2016, San Francisco Airport, CA, USA, August 08 - 10, 2016. ACM 2016, ISBN 978-1-4503-4185-1
Keynote Address
- Vida Ilderem:
Innovation for Future Connected Compute. 1 - Rob Aitken:
Coordinating Communication, Technology and Design in the IOT Era. 2 - Goutam Chattopadhyay:
Terahertz Technology and its Applications: Is it All Hype? 3
Novel Technologies & Resilience Design
- Zheng Li, Xiuyuan Bi, Hai (Helen) Li, Yiran Chen, Jianying Qin, Peng Guo, Wenjie Kong, Wenshan Zhan, Xiufeng Han, Hong Zhang, Lingling Wang, Guanping Wu, Hanming Wu:
Design and Implementation of a 4Kb STT-MRAM with Innovative 200nm Nano-ring Shaped MTJ. 4-9 - Danni Wang, Sumitha George, Ahmedullah Aziz
, Suman Datta, Vijaykrishnan Narayanan, Sumeet Kumar Gupta:
Ferroelectric Transistor based Non-Volatile Flip-Flop. 10-15 - Weizhe Hua, Ramy N. Tadros, Peter A. Beerel:
Low Area, Low Power, Robust, Highly Sensitive Error Detecting Latch for Resilient Architectures. 16-21 - Huanyu Wang, Geng Xie, Jie Gu:
Comprehensive Analysis, Modeling and Design for Hold-Timing Resiliency in Voltage Scalable Design. 22-27
Managing Energy in Wearable Devices
- Woo Suk Lee, Younghyun Kim, Vijay Raghunathan:
TeleProbe: Zero-power Contactless Probing for Implantable Medical Devices. 28-33 - Shreyas Sen:
SocialHBC: Social Networking and Secure Authentication using Interference-Robust Human Body Communication. 34-39 - Yukai Chen, Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino:
A Li-Ion Battery Charge Protocol with Optimal Aging-Quality of Service Trade-off. 40-45 - Ramyar Saeedi, Ramin Fallahzadeh, Parastoo Alinia, Hassan Ghasemzadeh:
An Energy-Efficient Computational Model for Uncertainty Management in Dynamically Changing Networked Wearables. 46-51
Accelerators for Machine Learning
- Zafar Takhirov, Joseph Wang, Venkatesh Saligrama, Ajay Joshi:
Energy-Efficient Adaptive Classifier Design for Mobile Systems. 52-57 - Taesik Na, Saibal Mukhopadhyay:
Speeding up Convolutional Neural Network Training with Dynamic Precision Scaling and Flexible Multiplier-Accumulator. 58-63 - Abbas Rahimi, Pentti Kanerva, Jan M. Rabaey:
A Robust and Energy-Efficient Classifier Using Brain-Inspired Hyperdimensional Computing. 64-69
Design Methodology for 3D IC
- Kwang Min Kim, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim:
Four-tier Monolithic 3D ICs: Tier Partitioning Methodology and Power Benefit Study. 70-75 - Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Diederik Verkest, Aaron Thean, Sung Kyu Lim:
Physical Design Solutions to Tackle FEOL/BEOL Degradation in Gate-level Monolithic 3D ICs. 76-81 - Tiantao Lu, Caleb Serafy, Zhiyuan Yang, Ankur Srivastava:
Voltage Noise Induced DRAM Soft Error Reduction Technique for 3D-CPUs. 82-87
Novel Circuit Design for Energy Efficiency
- Ravinder Rachala, Miguel Rodriguez, Stephen Kosonocky, Milos Trajkovic:
Modeling and implementation of a fully-digital integrated per-core voltage regulation system in a 28nm high performance 64-bit processor. 88-93 - Ali Najafi, Jacques Christophe Rudell, Visvesh Sathe:
Regenerative Breaking: Recovering Stored Energy from Inactive Voltage Domains for Energy-efficient Systems-on-Chip. 94-99 - Zhengyu Chen, Jie Gu:
Analysis and Design of Energy Efficient Time Domain Signal Processing. 100-105
Energy Optimization for Emerging Applications
- Tongda Wu, Yongpan Liu, Hehe Li, Chun Jason Xue, Hyung Gyu Lee, Huazhong Yang:
SATS: An Ultra-Low Power Time Synchronization for Solar Energy Harvesting WSNs. 106-111 - Bita Darvish Rouhani, Azalia Mirhoseini, Farinaz Koushanfar:
DeLight: Adding Energy Dimension To Deep Neural Networks. 112-117 - Amaravati Anvesha, Shaojie Xu, Ningyuan Cao, Justin Romberg, Arijit Raychowdhury:
A Light-powered, "Always-On", Smart Camera with Compressed Domain Gesture Detection. 118-123
Hardware Security
- Chen Zhou, Saroj Satapathy, Yingjie Lao, Keshab K. Parhi, Chris H. Kim:
Soft Response Generation and Thresholding Strategies for Linear and Feed-Forward MUX PUFs. 124-129 - Monodeep Kar, Arvind Singh, Sanu Mathew, Anand Rajan, Vivek De, Saibal Mukhopadhyay:
Exploiting Fully Integrated Inductive Voltage Regulators to Improve Side Channel Resistance of Encryption Engines. 130-135 - Jae-Won Jang, Swaroop Ghosh:
Performance Impact of Magnetic and Thermal Attack on STTRAM and Low-Overhead Mitigation Techniques. 136-141 - Hongxiang Gu, Teng Xu, Miodrag Potkonjak:
An Energy-Efficient PUF Design: Computing While Racing. 142-147
Heterogeneous Computing in Data Centers for Energy Efficiency
- Jian Ouyang, Wei Qi, Yong Wang:
Extending the Moore's law by exploring new data center architecture: Invited Paper. 148-149 - Derek Chiou:
Heterogeneous Computing and Infrastructure for Energy Efficiency in Microsoft Data Centers: Extended Abstract. 150-151 - Herman Schmit, Randy Huang:
Dissecting Xeon + FPGA: Why the integration of CPUs and FPGAs makes a power difference for the datacenter: Invited Paper. 152-153 - Jason Cong, Muhuan Huang, Peichen Pan, Di Wu, Peng Zhang:
Software Infrastructure for Enabling FPGA-Based Accelerations in Data Centers: Invited Paper. 154-155
Architectures for Approximate Computing
- Ting Wang, Qian Zhang, Nam Sung Kim, Qiang Xu:
On Effective and Efficient Quality Management for Approximate Computing. 156-161 - Mohsen Imani, Yeseong Kim, Abbas Rahimi, Tajana Rosing:
ACAM: Approximate Computing Based on Adaptive Associative Memory with Online Learning. 162-167 - Jaeha Kung, Duckhwan Kim, Saibal Mukhopadhyay:
Dynamic Approximation with Feedback Control for Energy-Efficient Recurrent Neural Network Hardware. 168-173
Low Power Design Methodologies
- Sriram Sundaram, Warren He, Sriram Sambamurthy, Aaron Grenat, Steven Liepe, Samuel Naffziger:
Unified Power Frequency Model Framework. 174-179 - Matthew M. Ziegler, Hung-Yi Liu, Luca P. Carloni:
Scalable Auto-Tuning of Synthesis Parameters for Optimizing High-Performance Processors. 180-185 - Sushma Honnavara Prasad:
Overview of IEEE1801-2015: Standard for Design and Verification of Low-Power, Energy-Aware Electronic Systems: Invited Paper. 186
Low-power Designs for Sensing and Media
- Dongliang Chen, Jonathon Edstrom, Xiaowei Chen, Wei Jin, Jinhui Wang, Na Gong:
Data-Driven Low-Cost On-Chip Memory with Adaptive Power-Quality Trade-off for Mobile Video Streaming. 188-193 - Jong Hwan Ko, Saibal Mukhopadhyay:
An Energy-Aware Approach to Noise-Robust Moving Object Detection for Low-Power Wireless Image Sensor Platforms. 194-199 - Matthew Tomei, Henry Duwe, Nam Sung Kim, Rakesh Kumar:
Bit Serializing a Microprocessor for Ultra-low-power. 200-205 - Aosen Wang, Zhanpeng Jin, Wenyao Xu:
A Programmable Analog-to-Information Converter for Agile Biosensing. 206-211
Dynamic Power and Thermal Management
- Chih-Hsun Chou, Daniel Wong, Laxmi N. Bhuyan:
DynSleep: Fine-grained Power Management for a Latency-Critical Data Center Application. 212-217 - Jurn-Gyu Park, Nikil D. Dutt, Hoyeonjiki Kim, Sung-Soo Lim:
HiCAP: Hierarchical FSM-based Dynamic Integrated CPU-GPU Frequency Capping Governor for Energy-Efficient Mobile Gaming. 218-223 - Taejoon Song, Daniel Lo, G. Edward Suh:
Prediction-Guided Performance-Energy Trade-off with Continuous Run-Time Adaptation. 224-229 - Majed Valad Beigi, Gokhan Memik:
Therma: Thermal-aware Run-time Thread Migration for Nanophotonic Interconnects. 230-235
Poster Session
- Fabian Oboril, Fazal Hameed, Rajendra Bishnoi, Ali Ahari, Helia Naeimi, Mehdi Baradaran Tahoori:
Normally-OFF STT-MRAM Cache with Zero-Byte Compression for Energy Efficient Last-Level Caches. 236-241 - Chang-Hung Yu, Pin Su, Ching-Te Chuang:
Benchmarking of Monolayer and Bilayer Two-Dimensional Transition Metal Dichalcogenide (TMD) Based Logic Circuits and 6T SRAM Cells. 242-247 - Jinsoo Park, Hojung Cha:
T-DVS: Temperature-aware DVS based on Temperature Inversion Phenomenon. 248-253 - Byoungchan Oh, Nilmini Abeyratne, Jeongseob Ahn, Ronald G. Dreslinski, Trevor N. Mudge:
Enhancing DRAM Self-Refresh for Idle Power Reduction. 254-259 - Arun Joseph, Spandana Rachamalla, Rahul M. Rao, Anand Haridass, Pradeep Kumar Nalla:
FVCAG: A framework for formal verification driven power modeling and verification. 260-265 - Neel Gala, Swagath Venkataramani, Anand Raghunathan, V. Kamakoti:
STOCK: Stochastic Checkers for Low-overhead Approximate Error Detection. 266-271 - Anteneh Gebregiorgis, Mohammad Saber Golanbari, Saman Kiamehr, Fabian Oboril, Mehdi Baradaran Tahoori:
Maximizing Energy Efficiency in NTC by Variation-Aware Microprocessor Pipeline Optimization. 272-277 - Jaehoon Jun, Cyuyeol Rhee, Suhwan Kim:
A 386-μW, 15.2-bit Programmable-Gain Embedded Delta-Sigma ADC for Sensor Applications. 278-283 - William J. Song, Alper Buyuktosunoglu, Chen-Yong Cher, Pradip Bose:
Measurement-Driven Methodology for Evaluating Processor Heterogeneity Options for Power-Performance Efficiency. 284-289 - Yi Wang, Mingxu Zhang, Lisha Dong, Xuan Yang:
A Thermal-Aware Physical Space Allocation Strategy for 3D Flash Memory Storage Systems. 290-295 - Farshad Ghanei, Pranav Tipnis, Kyle Marcus, Karthik Dantu, Steven Y. Ko, Lukasz Ziarek:
OS-based Resource Accounting for Asynchronous Resource Use in Mobile Systems. 296-301 - Byung-Hoon Lee, Young-Jin Kim:
Dynamic Voltage Scaling Using Scene Change Detection for Video Playback on Mobile AMOLED Displays. 302-307 - Dimitrios Stamoulis, Diana Marculescu:
Can We Guarantee Performance Requirements under Workload and Process Variations? 308-313 - Zhezhi He, Deliang Fan:
A Low Power Current-Mode Flash ADC with Spin Hall Effect based Multi-Threshold Comparator. 314-319 - Sandeep Kumar Samal, Deepak Nayak, Motoi Ichihashi, Srinivasa Banna, Sung Kyu Lim:
How to Cope with Slow Transistors in the Top-tier of Monolithic 3D ICs: Design Studies and CAD Solutions. 320-325 - Chen Zhang, Di Wu, Jiayu Sun, Guangyu Sun, Guojie Luo, Jason Cong:
Energy-Efficient CNN Implementation on a Deeply Pipelined FPGA Cluster. 326-331
Non-Volatile Memory: Technology & System
- Jinil Chung, Jongsun Park, Swaroop Ghosh:
Domain Wall Memory based Convolutional Neural Networks for Bit-width Extendability and Energy-Efficiency. 332-337 - Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara:
Design and implementation of nonvolatile power-gating SRAM using SOTB technology. 338-343 - Wen Zhou, Dan Feng, Yu Hua, Jingning Liu, Fangting Huang, Yu Chen:
An Efficient Parallel Scheduling Scheme on Multi-partition PCM Architecture. 344-349 - Amirali Ghofrani, Miguel Angel Lastras-Montaño, Yuyang Wang, Kwang-Ting Cheng:
In-place Repair for Resistive Memories Utilizing Complementary Resistive Switches. 350-355
Energy-Efficient Parallel Processing
- Homa Aghilinasab, Mohammad Sadrosadati, Mohammad Hossein Samavatian, Hamid Sarbazi-Azad:
Reducing Power Consumption of GPGPUs Through Instruction Reordering. 356-361 - Ivan Ratkovic, Oscar Palomar, Milan Stanic, Osman S. Unsal, Adrián Cristal, Mateo Valero:
A Fully Parameterizable Low Power Design of Vector Fused Multiply-Add Using Active Clock-Gating Techniques. 362-367 - Ali Aalsaud, Rishad A. Shafik, Ashur Rafiev, Fei Xia, Sheng Yang, Alex Yakovlev:
Power-Aware Performance Adaptation of Concurrent Applications in Heterogeneous Many-Core Systems. 368-373
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