ISLPED 2003: Seoul, Korea

Plenary speeches

Low power caches

Power modeling and optimization for embedded systems

Design strategies for active power reduction

Leakage estimation

Design strategies for controlling standby leakage

Advances in low power synthesis

Power estimation and design for scaled technologies

Low power analog building blocks

Keynote speech 1

Temperature and power aware architectures

Keynote speech 2

Power efficient cache design

System estimation and voltage scheduling

Energy efficient microarchitectural techniques

High speed converters, amplifiers, and low power analog circuits

Keynote speech 3

Circuit considerations for low power

System level issues

Keynote speech 4

RF communication circuits

Sensor networks and communication systems

maintained by Schloss Dagstuhl LZI at University of Trier