DFT 2001: San Francisco, CA, USA

Wafer Scale


Dependable Design

Testing Techniques 1

Fault-Tolerance in Arrays

Fault Detection

FPGA Based Applications

Fault Injection

Testing Techniques 2

Error Correcting Codes

Mixed Signal Circuits

Defect Analysis

Self-Checking and Fail-Safe Circuits

Fault-Tolerant Techniques

maintained by Schloss Dagstuhl LZI at University of Trier