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Publication search results
found 70 matches
- 1998
- Sultan M. Al-Harbi, Sandeep K. Gupta:
A Methodology for Transforming Memory Tests for In-System Testing of Direct Mapped Cache Tags. VTS 1998: 394-400 - Florence Azaïs, Michel Renovell, Yves Bertrand, J.-C. Bodin:
Design-For-Testability for Switched-Current Circuits. VTS 1998: 370-375 - Debashis Bhattacharya:
Hierarchical Test Access Architecture for Embedded Cores in an Integrated Circuit. VTS 1998: 8-14 - Pradip Bose:
Performance Test Case Generation for Microprocessors. VTS 1998: 54-61 - Víctor H. Champac, José Castillejos, Joan Figueras:
IDDQ Testing of Opens in CMOS SRAMs. VTS 1998: 106-111 - Jonathan T.-Y. Chang, Chao-Wen Tseng, Yi-Chin Chu, Sanjay Wattal, Mike Purtell, Edward J. McCluskey:
Experimental Results for IDDQ and VLV Testing. VTS 1998: 118-125 - Bruce F. Cockburn, Albert L.-C. Kwong:
Transition Maximization Techniques for Enhancing the Two-Pattern Fault Coverage of Pseudorandom Test Pattern Generators. VTS 1998: 430-439 - Fulvio Corno, Nicola Gaudenzi, Paolo Prinetto, Matteo Sonza Reorda:
On the Identification of Optimal Cellular Automata for Built-In Self-Test of Sequential Circuits. VTS 1998: 424-429 - Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda:
A Test Pattern Generation Methodology for Low-Power Consumption. VTS 1998: 453-459 - Debaleena Das, Nur A. Touba:
Synthesis of Circuits with Low-Cost Concurrent Error Detection Based on Bose-Lin Codes. VTS 1998: 309-317 - Marie-Lise Flottes, R. Pires, Bruno Rouzeyre, Laurent Volpe:
Low Cost Partial Scan Design: A High Level Synthesis Approach. VTS 1998: 332-340 - T. A. García, Antonio J. Acosta, José L. Huertas, J. M. Mora, J. Ramos:
Self-Timed Boundary-Scan Cells for Multi-Chip Module Test. VTS 1998: 92-97 - Fernando M. Gonçalves, João Paulo Teixeira:
Sampling Techniques of Non-Equally Probable Faults in VLSI System. VTS 1998: 283-288 - Ad J. van de Goor, Said Hamdioui:
Fault Models and Tests for Two-Port Memories. VTS 1998: 401-410 - Sandip Gupta, Craig Gleason:
Validation and Test Problems for Cross Talk Noise. VTS 1998: 322-323 - Ilker Hamzaoglu, Janak H. Patel:
New Techniques for Deterministic Test Pattern Generation. VTS 1998: 446-452 - David F. Heidel, Sang H. Dhong, H. Peter Hofstee, Michael Immediato, Kevin J. Nowka, Joel Silberman, Kevin Stawiasz:
High-Speed Serializing/De-Serializing Design-For-Test Method for Evaluating a 1 GHz Microprocessor. VTS 1998: 234-238 - Keerthi Heragu:
Where We Might Stumble with Embedded-System Test. VTS 1998: 470 - Andre Hertwig, Sybille Hellebrand, Hans-Joachim Wunderlich:
Fast Self-Recovering Controllers. VTS 1998: 296-302 - Masahiro Ishida, Dong Sam Ha, Takahiro J. Yamaguchi:
COMPACT: A Hybrid Method for Compressing Test Data. VTS 1998: 62-69 - Vikram Iyengar, Krishnendu Chakrabarty, Brian T. Murray:
Built-In Self Testing of Sequential Circuits Using Precomputed Test Sets. VTS 1998: 418-423 - Madhu K. Iyer, Michael L. Bushnell:
Effect of Noise on Analog Circuit Testing. VTS 1998: 138-144 - Jean-Michel Karam, Marcelo Lubaszewski, R. D. Shawn Blanton, Andrew Richardson:
Testing MEMS. VTS 1998: 320-321 - Dimitrios Karayiannis, Spyros Tragoudas:
A Nonenumerative ATPG for Functionally Sensitizable Path Delay Faults. VTS 1998: 440-445 - Jeffrey S. Kasten:
An Introduction to RF Testing: Device, Method and System. VTS 1998: 462-469 - Xrysovalantis Kavousianos, Dimitris Nikolos:
Novel Single and Double Output TSC Berger Code Checkers. VTS 1998: 348-353 - Stephen V. Kosonocky, Arthur A. Bright, Kevin W. Warren, Ruud A. Haring, Steve Klepner, Sameh W. Asaad, S. Basavaiah, Bob Havreluk, David F. Heidel, Michael Immediato, Keith A. Jenkins, Rajiv V. Joshi, Benjamin D. Parker, T. V. Rajeevakumar, Kevin Stawiasz:
Designing a Testable System on a Chip. VTS 1998: 2-7 - Arsen Kuchukyan:
Estimation of Error Detection Probability and Latency of Checking Methods for a Given Circuit under Check. VTS 1998: 362-369 - Andreas Lechner, Andrew Richardson, B. Hermes, Michael J. Ohletz:
A Design for Testability Study on a High Performance Automatic Gain Control Circuit. VTS 1998: 376-385 - Kyung Tek Lee, Clay Nordquist, Jacob A. Abraham:
Automatic Test Pattern Generation for Crosstalk Glitches in Digital Circuits. VTS 1998: 34-41
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