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Raoul Velazco
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2020 – today
- 2021
- [c63]João Paulo Brum, T. Kraemer Sartori, J. Lin, Matheus Garay Trindade, Hassen Fourati, Raoul Velazco, Rodrigo Possamai Bastos:
Evaluation of Attitude Estimation Algorithm under Soft Error Effects. LATS 2021: 1-5 - [c62]Fabrice Pancher, Vanessa Vargas, Pablo Ramos, Rodrigo Possamai Bastos, David César Ardiles Saravia
, Raoul Velazco:
Nanosatellite On-Board Computer including a Many-Core Processor. LATS 2021: 1-6
2010 – 2019
- 2019
- [c61]Alexandre Coelho, Nacer-Eddine Zergainoh, Raoul Velazco:
NoCFI: A Hybrid Fault Injection Method for Networks-On-Chip. LATS 2019: 1-6 - [c60]Pablo A. Ferreyra, Juan A. Fraire, Fabian Gomez, Raoul Velazco, Daniel Sánchez, Dardo Vinas Viscardi:
Delay-Tolerant Wireless Networks on Chip: Preliminary Analysis and Results. LATS 2019: 1-6 - [c59]Daniel Sánchez, Pablo A. Ferreyra, Juan A. Fraire, Fabian Gomez, Raoul Velazco, Dardo Vinas Viscardi:
A Wireless Embedded System for Measuring the Effects of Ionizing Radiations. LATS 2019: 1-6 - 2018
- [c58]Alexandre Coelho, Amir Charif, Nacer-Eddine Zergainoh, Juan A. Fraire, Raoul Velazco:
A soft-error resilient route computation unit for 3D Networks-on-Chips. DATE 2018: 1357-1362 - [c57]Alexandre Coelho, Amir Charif, Nacer-Eddine Zergainoh, Raoul Velazco:
A Runtime Fault-Tolerant Routing Scheme for Partially Connected 3D Networks-on-Chip. DFT 2018: 1-6 - 2017
- [j11]Juan A. Fraire
, Pablo G. Madoery, Scott C. Burleigh, Marius Feldmann, Jorge M. Finochietto
, Amir Charif, Nacer-Eddine Zergainoh, Raoul Velazco:
Assessing Contact Graph Routing Performance and Reliability in Distributed Satellite Constellations. J. Comput. Networks Commun. 2017: 2830542:1-2830542:18 (2017) - [c56]Thierry Bonnoit
, Nacer-Eddine Zergainoh, Michael Nicolaidis, Raoul Velazco:
Low cost rollback to improve fault-tolerance in VLSI circuits. LASCAS 2017: 1-4 - [c55]Thierry Bonnoit
, Alexandre Coelho, Nacer-Eddine Zergainoh, Raoul Velazco:
SEU impact in processor's control-unit: Preliminary results obtained for LEON3 soft-core. LATS 2017: 1-4 - [c54]M. Solinas, Alexandre Coelho, Juan A. Fraire
, Nacer-Eddine Zergainoh, Pablo A. Ferreyra, Raoul Velazco:
Preliminary results of NETFI-2: An automatic method for fault injection on HDL-based designs. LATS 2017: 1-4 - 2016
- [j10]Juan Antonio Clemente
, Wassim Mansour, Rafic Ayoubi, Felipe Serrano
, Hortensia Mecha
, Haissam Ziade, Wassim El Falou, Raoul Velazco:
Hardware implementation of a fault-tolerant Hopfield Neural Network on FPGAs. Neurocomputing 171: 1606-1609 (2016) - [j9]Anis Souari, Claude Thibeault, Yves Blaquière
, Raoul Velazco:
Towards an efficient SEU effects emulation on SRAM-based FPGAs. Microelectron. Reliab. 66: 173-182 (2016) - [c53]Afef Kchaou, W. El Hadj Youssef, Rached Tourki, Fraidy Bouesse, Pablo Ramos, Raoul Velazco:
A deep analysis of SEU consequences in the internal memory of LEON3 processor. LATS 2016: 178 - [c52]Juan A. Fraire
, Pablo G. Madoery
, Jorge M. Finochietto, Pablo A. Ferreyra, Raoul Velazco:
Internetworking approaches towards along-track segmented satellite architectures. WiSEE 2016: 123-128 - 2015
- [c51]Anis Souari, Claude Thibeault, Yves Blaquière, Raoul Velazco:
An automated fault injection for evaluation of LUTs robustness in SRAM-based FPGAs. EWDTS 2015: 1-4 - [c50]Anis Souari, Claude Thibeault, Yves Blaquière, Raoul Velazco:
Optimization of SEU emulation on SRAM FPGAs based on sensitiveness analysis. IOLTS 2015: 36-39 - [c49]Vanessa Vargas
, Pablo Ramos, Raoul Velazco, Jean-François Méhaut, Nacer-Eddine Zergainoh:
Evaluating SEU fault-injection on parallel applications implemented on multicore processors. LASCAS 2015: 1-4 - 2014
- [c48]Vanessa Vargas
, Pablo Ramos, Wassim Mansour, Raoul Velazco, Nacer-Eddine Zergainoh, Jean-François Méhaut
:
Preliminary results of SEU fault-injection on multicore processors in AMP mode. IOLTS 2014: 194-197 - [c47]Wassim Mansour, Miguel A. Aguirre
, Hipólito Guzmán-Miranda
, Javier Barrientos Rojas, Raoul Velazco:
Two complementary approaches for studying the effects of SEUs on HDL-based designs. IOLTS 2014: 220-221 - [c46]Wassim Mansour, Pablo Ramos, Rafic A. Ayoubi, Raoul Velazco:
SEU fault-injection at system level: Method, tools and preliminary results. LATW 2014: 1-5 - 2013
- [j8]Wassim Mansour
, Raoul Velazco:
SEU Fault-Injection in VHDL-Based Processors: A Case Study. J. Electron. Test. 29(1): 87-94 (2013) - [c45]Wassim Mansour, Raoul Velazco, Rafic Ayoubi, Wassim El Falou, Haissam Ziade:
Fault-tolerance capabilities of a software-implemented Hopfield Neural Network. ICCIT 2013: 205-208 - [c44]Greicy Marques-Costa, Wassim Mansour, Fabrice Pancher, Raoul Velazco, Alain Bui, Devan Sohier:
Optimization of a self-converging algorithm at assembly level to improve SEU fault-tolerance. LASCAS 2013: 1-4 - 2012
- [c43]Wassim Mansour, Raoul Velazco:
SEU fault-injection in VHDL-based processors: A case study. LATW 2012: 1-5 - 2011
- [j7]Wassim Mansour, Rafic A. Ayoubi, Haissam Ziade, Raoul Velazco, Wassim El Falou:
An Optimal Implementation on FPGA of a Hopfield Neural Network. Adv. Artif. Neural Syst. 2011: 189368:1-189368:9 (2011) - [j6]Gilles Foucard, Paul Peronnard, Raoul Velazco:
Reliability Limits of TMR Implemented in a SRAM-based FPGA: Heavy Ion Measures vs. Fault Injection Predictions. J. Electron. Test. 27(5): 627-633 (2011) - [j5]Haissam Ziade, Rafic A. Ayoubi, Raoul Velazco, Tareck Idriss:
A new fault injection approach to study the impact of bitflips in the configuration of SRAM-based FPGAs. Int. Arab J. Inf. Technol. 8(2): 155-162 (2011) - [c42]Raoul Velazco, Gilles Foucard, Fabrice Pancher, Wassim Mansour
, Greicy Marques-Costa, Devan Sohier, Alain Bui:
Robustness with respect to SEUs of a self-converging algorithm. LATW 2011: 1-5 - 2010
- [c41]John M. Espinosa-Duran, Vladimir Trujillo-Olaya
, Jaime Velasco-Medina
, Raoul Velazco:
Bit-flip injection strategies for FSMs modeled in VHDL behavioral level. LATW 2010: 1-5 - [c40]Gilles Foucard, Paul Peronnard, Raoul Velazco:
Reliability limits of TMR implemented in a SRAM-based FPGA: Heavy ion measures vs. fault injection predictions. LATW 2010: 1-5 - [c39]Vladimir Trujillo-Olaya
, John M. Espinosa-Duran, Jaime Velasco-Medina
, Raoul Velazco:
Dependability validation of a cryptoprocessor to SEU effects. LATW 2010: 1-6
2000 – 2009
- 2009
- [c38]Guillaume Hubert
, Raoul Velazco, Paul Peronnard:
A generic platform for remote accelerated tests and high altitude SEU experiments on advanced ICs: Correlation with MUSCA SEP3 calculations. IOLTS 2009: 180 - [c37]Ezequiel Brac, Pablo A. Ferreyra, Raoul Velazco, Carlos A. Marqués:
Test and qualification of a Fault Tolerant FPGA based Active Antenna System for space applications. LATW 2009: 1-5 - 2008
- [c36]Vincent Pouget, Alexandre Douin, Gilles Foucard, Paul Peronnard, Dean Lewis, Pascal Fouillat, Raoul Velazco:
Dynamic Testing of an SRAM-Based FPGA by Time-Resolved Laser Fault Injection. IOLTS 2008: 295-301 - 2005
- [c35]Raoul Velazco, R. Ecoffet, F. Faure:
How to Characterize the Problem of SEU in Processors and Representative Errors Observed on Flight. IOLTS 2005: 303-308 - 2004
- [j4]Haissam Ziade, Rafic A. Ayoubi, Raoul Velazco:
A Survey on Fault Injection Techniques. Int. Arab J. Inf. Technol. 1(2): 171-186 (2004) - [c34]Lorena Anghel
, Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero, Raoul Velazco:
Coupling Different Methodologies to Validate Obsolete Microprocessors. DFT 2004: 250-255 - [c33]Bogdan Nicolescu, Yvon Savaria, Raoul Velazco:
Performance Evaluation and Failure Rate Prediction for the Soft Implemented Error Detection Technique. IOLTS 2004: 233-238 - 2003
- [j3]Raoul Velazco, Sana Rezgui, Haissam Ziade:
Assessing the Soft Error Rate of Digital Architectures Devoted to Operate in Radiation Environment: A Case Studied. J. Electron. Test. 19(1): 83-90 (2003) - [c32]Bogdan Nicolescu, Raoul Velazco:
Detecting Soft Errors by a Purely Software Approach: Method, Tools and Experimental Results. DATE 2003: 20057-20063 - [c31]Bogdan Nicolescu, Paul Peronnard, Raoul Velazco, Yvon Savaria:
Efficiency of Transient Bit-Flips Detection by Software Means: A Complete Study. DFT 2003: 377-384 - [c30]Lorena Anghel
, Raoul Velazco, S. Saleh, S. Deswaertes, A. El Moucary:
Preliminary Validation of an Approach Dealing with Processor Obsolescence. DFT 2003: 493- - [c29]Bogdan Nicolescu, Yvon Savaria, Raoul Velazco:
SIED: Software Implemented Error Detection. DFT 2003: 589-596 - [c28]Monica Alderighi
, Fabio Casini, Sergio D'Angelo, F. Faure, Marcello Mancini, Sandro Pastore, Giacomo R. Sechi, Raoul Velazco:
Radiation test methodology for SRAM-based FPGAs by using THESIC. IOLTS 2003: 162 - [c27]Raoul Velazco, Lorena Anghel
, S. Saleh:
A Methodology for Test Replacement Solutions of Obsolete Processors. IOLTS 2003: 209-213 - [p1]Bogdan Nicolescu, Raoul Velazco:
Detecting Soft Errors by a Purely Software Approach: Method, Tools and Experimental Results. Embedded Software for SoC 2003: 39-51 - 2002
- [c26]Raoul Velazco, A. Corominas, Pablo A. Ferreyra:
Injecting Bit Flip Faults by Means of a Purely Software Approach: A Case Studied. DFT 2002: 108-116 - [c25]Gian Carlo Cardarilli, F. Kaddour, A. Leandri, Marco Ottavi
, Salvatore Pontarelli
, Raoul Velazco:
Bit Flip Injection in Processor-Based Architectures: A Case Study. IOLTW 2002: 117- - [c24]Fernanda Gusmão de Lima Kastensmidt, Luigi Carro, Raoul Velazco, Ricardo Augusto da Luz Reis:
Injecting Multiple Upsets in a SEU Tolerant 8051 Micro-Controller. IOLTW 2002: 194 - [c23]F. Kaddour, Sana Rezgui, Raoul Velazco, S. Rodriguez, J. R. De Mingo:
Error Rate Estimation for a Flight Application Using the CEU Fault Injection Approach. IOLTW 2002: 195 - [c22]Bogdan Nicolescu, Raoul Velazco, Matteo Sonza Reorda, Maurizio Rebaudengo, Massimo Violante:
A Software Fault Tolerance Method for Safety-Critical Systems: Effectiveness and Drawbacks. SBCCI 2002: 101-108 - 2001
- [j2]Érika F. Cota, Fernanda Lima, Sana Rezgui, Luigi Carro
, Raoul Velazco, Marcelo Lubaszewski, Ricardo Reis:
Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults. J. Electron. Test. 17(2): 149-161 (2001) - [c21]Ph. Cheynet, Bogdan Nicolescu, Raoul Velazco, Maurizio Rebaudengo
, Matteo Sonza Reorda
, Massimo Violante:
System safety through automatic high-level code transformations: an experimental evaluation. DATE 2001: 297-301 - [c20]Raoul Velazco, Régis Leveugle, Oscar Calvo:
Upset-Like Fault Injection in VHDL Descriptions: A Method and Preliminary Results. DFT 2001: 259- - [c19]Bogdan Nicolescu, Raoul Velazco, Matteo Sonza Reorda
:
Effectiveness and Limitations of Various Software Techniques for "Soft Error" Detection: A Comparative Study. IOLTW 2001: 172-177 - [c18]Raoul Velazco, A. Bragagnini, Oscar Calvo:
Upset-like fault injection in VHDL descriptions: A Method and Preliminary Results. LATW 2001: 13-18 - [c17]Raoul Velazco, Sana Rezgui, Haissam Ziade:
Assessing the Soft Error Rate of Digital Architectures Devoted to Operate in Radiation Environment: A Case Studied. LATW 2001: 24-29 - [c16]Jim Chung, N. Derhacobian, Jean Gasiot, Michael Nicolaidis, David Towne, Raoul Velazco:
Soft Errors and Tolerance for Soft Errors. VTS 2001: 279-280 - 2000
- [c15]Maurizio Rebaudengo, Matteo Sonza Reorda
, Massimo Violante, Ph. Cheynet, Bogdan Nicolescu, Raoul Velazco:
Evaluating the Effectiveness of a Software Fault-Tolerance Technique on RISC- and CISC-Based Architectures. IOLTW 2000: 17- - [c14]Fabian Vargas, Alexandre M. Amory
, Raoul Velazco:
Estimating Circuit Fault-Tolerance by Means of Transient-Fault Injection in VHDL. IOLTW 2000: 67-72 - [c13]Raoul Velazco, Sana Rezgui:
Transient Bitflip Injection in Microprocessor Embedded Applications. IOLTW 2000: 80- - [c12]Fabian Vargas, Alexandre M. Amory, Raoul Velazco:
Fault-Tolerance in VHDL Description: Transient-Fault Injection & Early Reliability Estimation. LATW 2000: 29-35 - [c11]Ph. Cheynet, Raoul Velazco, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
Hardening the Software with Respect to Transient Errors: a Method and Experimental Results. LATW 2000: 36-40 - [c10]Fernanda Gusmão de Lima, Érika F. Cota, Luigi Carro, Marcelo Lubaszewski, Ricardo Reis, Raoul Velazco, Sana Rezgui:
Designing a Radiation Hardened 8051-Like Micro-Controller. SBCCI 2000: 255-262
1990 – 1999
- 1999
- [c9]Raoul Velazco, Christelle Godin
, Ph. Cheynet, Santiago Torres-Alegre, Diego Andina, Mirka B. Gordon:
Study of Two ANN Digital Implementations of a Radar Detector Candidate to an On-Board Satellite Experiment. IWANN (2) 1999: 615-624 - 1998
- [c8]Raoul Velazco, Ph. Cheynet, R. Ecoffet:
Operation in Space of Artificial Neural Networks Implemented by Means of a Dedicated Architecture based on a Transputer. SBCCI 1998: 162-166 - 1997
- [c7]Jean-Denis Muller, Ph. Cheynet, Raoul Velazco:
Analysis and Improvement of Neural Network Robustness for On-Board Satellite Image Processing. ICANN 1997: 1211-1216 - 1991
- [j1]P. Caspi, J. Piotrowski, Raoul Velazco:
An A Priori Approach to the Evaluation of Signature Analysis Efficiency. IEEE Trans. Computers 40(9): 1068-1071 (1991) - 1990
- [c6]Raoul Velazco, Catherine Bellon, Bernard Martinet:
Failure coverage of functional test methods: a comparative experimental evaluation. ITC 1990: 1012-1017
1980 – 1989
- 1988
- [c5]Catherine Bellon, Raoul Velazco, Haissam Ziade:
Analysis of Experimental Results on Functional Testing and Diagnosis of Complex Circuits. ITC 1988: 64-72 - 1985
- [c4]Raoul Velazco, Haissam Ziade, E. Kolokithas:
A Microprocessor Test Approach Allowing Fault Localization. ITC 1985: 737-743 - 1984
- [c3]Catherine Bellon, Raoul Velazco:
Taking into account asynchronous signals in functional test of complex circuits. DAC 1984: 490-496 - [c2]Catherine Bellon, Raoul Velazco:
Hardware and Software Tools for Microprocessor Functional Test. ITC 1984: 804-820 - 1982
- [b1]Raoul Velazco:
Test comportemental de microprocesseurs. Grenoble Institute of Technology, France, 1982 - [c1]Catherine Bellon, A. Liothin, Sylvain Sadier, Gabriele Saucier, Raoul Velazco, Francois Grillot, M. Issenman:
Automatic generation of microprocessor test programs. DAC 1982: 566-573
Coauthor Index
aka: Fernanda Gusmão de Lima Kastensmidt
aka: Fernanda Gusmão de Lima
aka: Fernanda Lima 0001
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