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ORCIDHiroaki Arimura
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Conference and Workshop Papers
- 2025
[c14]R. Asanovski, Hiroaki Arimura, J. Ganguly, Pierpaolo Palestri, Alexander Grill, Ben Kaczer, Naoto Horiguchi, Luca Selmi, Jacopo Franco:
Impact of Gate Metal Work Function on 1/f Noise in RMG MOSFETs. IRPS 2025: 1-6- [c13]J. P. Bastos, Jacopo Franco, Barry J. O'Sullivan, Yusuke Higashi, Adrian Chasin, J. Ganguly, Hiroaki Arimura, Alessio Spessot, M.-S. Kim, N. Horiguchi:
Gate Stack Development for Next Gen High Voltage Periphery DRAM Devices. IRPS 2025: 1-8 - [c12]G. Molinaro, Hiroaki Arimura, S. Sacchi, Andrea Vici, Robin Degraeve, Ben Kaczer, Naoto Horiguchi, M. Houssa, Jacopo Franco:
TDDB Reliability Improvement of Low Thermal Budget RMG Stacks. IRPS 2025: 1-6 - 2024
- [c11]J. P. Bastos, Barry J. O'Sullivan, Yusuke Higashi, Adrian Vaisman Chasin, Jacopo Franco, Hiroaki Arimura, J. Ganguly, Elena Capogreco, Alessio Spessot, N. Horiguchi:
Side and Corner Region Non-Uniformities in Grown SiO2 and Their Implications on Current, Capacitance and Breakdown Characteristics. IRPS 2024: 36 - [c10]Hiroaki Arimura, Hans Mertens, Jacopo Franco, L. Lukose, W. Maqsood, S. Brus, Thomas Chiarella, A. Impagnatiello, S. Homkar, V. K. Mootheri, C. Yin, G. Alessio Verni, M. Givens, L. Petersen Barbosa Lima, S. Biesemans, N. Horiguchi:
Vt Fine-Tuning in Multi-Vt Gate-All-Around Nanosheet nFETs Using Rare-Earth Oxide-Based Dipole-First Gate Stack Compatible with CFET Integration. VLSI Technology and Circuits 2024: 1-2 - [c9]J. Ganguly, Hiroaki Arimura, Romain Ritzenthaler, H. Bana, J. W. Maes, J. G. Lai, S. Brus, W. Maqsood, R. Sarkar, B. Kannan, Elena Capogreco, V. Machkaoutsan, S. Yoon, Alessio Spessot, M. Givens, Naoto Horiguchi:
DRAM-Peri FinFET - A Thermally-Stable High-Performance Advanced CMOS RMG Platform with Mo-Based pWFM for sub-10nm DRAM. VLSI Technology and Circuits 2024: 1-2 - 2023
- [c8]Hiroaki Arimura, S. Brus, Jacopo Franco, Yusuke Oniki, A. Vandooren, T. Conard, B. T. Chan, B. Kannan, M. Samiee, W. Li, P. Deminskyi, E. Shero, J. Bakke, Nicolas Jourdan, G. Alessio Verni, J. W. Maes, M. Givens, Lars-Åke Ragnarsson, Jérôme Mitard, E. Dentoni Litta, N. Horiguchi:
Molybdenum Nitride as a Scalable and Thermally Stable pWFM for CFET. VLSI Technology and Circuits 2023: 1-2 - [c7]Jacopo Franco, Hiroaki Arimura, J.-F. de Marneffe, S. Brus, Romain Ritzenthaler, E. Dentoni Litta, Kris Croes, Ben Kaczer, N. Horiguchi:
Novel Low Thermal Budget CMOS RMG: Performance and Reliability Benchmark Against Conventional High Thermal Budget Gate Stack Solutions. VLSI Technology and Circuits 2023: 1-2 - 2022
- [c6]Anabela Veloso, Anne Jourdain, D. Radisic, Rongmei Chen, G. Arutchelvan, B. O'Sullivan, Hiroaki Arimura, Michele Stucchi, An De Keersgieter, M. Hosseini, T. Hopf, K. D'Have, S. Wang, E. Dupuy, G. Mannaert, Kevin Vandersmissen, S. Iacovo, P. Marien, S. Choudhury, F. Schleicher
, F. Sebaai, Yusuke Oniki, X. Zhou, A. Gupta, Tom Schram, B. Briggs, C. Lorant, E. Rosseel, Andriy Hikavyy, Roger Loo, J. Geypen, D. Batuk, G. T. Martinez, J. P. Soulie, Katia Devriendt, B. T. Chan, S. Demuynck, Gaspard Hiblot, Geert Van der Plas, Julien Ryckaert, Gerald Beyer, E. Dentoni Litta, Eric Beyne, Naoto Horiguchi:
Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails. VLSI Technology and Circuits 2022: 284-285 - [c5]Romain Ritzenthaler, Elena Capogreco, E. Dupuy, Hiroaki Arimura, J. P. Bastos, P. Favia, F. Sebaai, D. Radisic, V. T. H. Nguyen, G. Mannaert, B. T. Chan, V. Machkaoutsan, Y. Yoon, H. Itokawa, M. Yamaguchi, Y. Chen, Pierre Fazan, S. Subramanian, Alessio Spessot, E. Dentoni Litta, S. Samavedam, Naoto Horiguchi:
High Performance Thermally Resistant FinFETs DRAM Peripheral CMOS FinFETs with VTH Tunability for Future Memories. VLSI Technology and Circuits 2022: 306-307 - [c4]A. Vandooren, N. Parihar, Jacopo Franco, Roger Loo, Hiroaki Arimura, R. Rodriguez, F. Sebaai, S. Iacovo, Kevin Vandersmissen, W. Li, G. Mannaert, D. Radisic, E. Rosseel, Andriy Hikavyy, Anne Jourdain, O. Mourey, G. Gaudin, Shay Reboh, L. Le Van-Jodin, Guillaume Besnard, C. Roda Neve, Bich-Yen Nguyen, Iuliana P. Radu, E. Dentoni Litta, N. Horiguchi:
Demonstration of 3D sequential FD-SOI on CMOS FinFET stacking featuring low temperature Si layer transfer and top tier device fabrication with tier interconnections. VLSI Technology and Circuits 2022: 330-331 - 2021
- [c3]Jacopo Franco, Hiroaki Arimura, J.-F. de Marneffe, A. Vandooren, L.-Å. Ragnarsson, Zhicheng Wu, Dieter Claes, E. Dentoni Litta, N. Horiguchi, Kris Croes, Dimitri Linten, Tibor Grasser, Ben Kaczer:
Novel low thermal budget gate stack solutions for BTI reliability in future Logic Device technologies : Invited paper. ICICDT 2021: 1-4 - 2016
- [c2]Nadine Collaert, AliReza Alian, Hiroaki Arimura, Geert Boccardi, Geert Eneman, Jacopo Franco, Tsvetan Ivanov, Dennis Lin, Jérôme Mitard, S. Ramesh, R. Rooyackers, Marc Schaekers, A. Sibaya-Hernandez, S. Sioncke, Quentin Smets, Abhitosh Vais, A. Vandooren, Anabela Veloso, Anne S. Verhulst, Devin Verreck, Niamh Waldron, Amey Walke, Liesbeth Witters, H. Yu, X. Zhou, Aaron Voon-Yew Thean:
Beyond-Si materials and devices for more Moore and more than Moore applications. ICICDT 2016: 1-5 - 2013
- [c1]Marc Aoulaiche, Eddy Simoen, Romain Ritzenthaler, Tom Schram, Hiroaki Arimura, Moonju Cho, Thomas Kauerauf, Guido Groeseneken, Naoto Horiguchi, Aaron Thean, Antonio Federico, Felice Crupi, Alessio Spessot, Christian Caillat, Pierre Fazan, Hyuokju Na, Y. Son, K. B. Noh:
Impact of Al2O3 position on performances and reliability in high-k metal gated DRAM periphery transistors. ESSDERC 2013: 190-193
Coauthor Index
aka: N. Horiguchi
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