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ORCIDJoao P. Bastos
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2020 – today
- 2025
[c9]J. P. Bastos, Jacopo Franco, Barry J. O'Sullivan, Yusuke Higashi, Adrian Chasin, J. Ganguly, Hiroaki Arimura, Alessio Spessot, M.-S. Kim, N. Horiguchi:
Gate Stack Development for Next Gen High Voltage Periphery DRAM Devices. IRPS 2025: 1-8- [c8]Simon Van Beek, Adrian Vaisman Chasin, Subhali Subhechha, Harold Dekkers, Nouredine Rassoul, Yiqun Wan, Hongwei Tang, Joao P. Bastos, Attilio Belmonte, Gouri Sankar Kar:
Dielectric Breakdown Analysis on Bottom and Top-Gated IGZO-TFT. IRPS 2025: 1-7 - [c7]Yusuke Higashi, Anirudh Varanasi
, Philippe J. Roussel, Pablo Saraza-Canflanca, J. P. Bastos, Alexander Grill, E. Catapano, R. Asanovski, Jacopo Franco, Ben Kaczer, Adrian Chasin, Devin Verreck, S. Ramesh, Laurent Breuil, Antonio Arreghini, S. Rachidi, Y. Jeong, Geert Van den Bosch, Maarten Rosmeulen, Robin Degraeve:
Advanced RTN Analysis on 3D NAND Trench Devices Using Physics-Informed Machine Learning Framework. IRPS 2025: 1-6 - 2024
- [c6]Yusuke Higashi, J. P. Bastos, Adrian Vaisman Chasin, Laurent Breuil, Antonio Arreghini, S. Ramesh, S. Rachidi, Y. Jeong, Geert Van den Bosch, Maarten Rosmeulen:
Investigation of the Impact of Ferroelectricity Boosted Gate Stacks for 3D NAND on Short Time Data Retention and Endurance. IRPS 2024: 1-6 - [c5]J. P. Bastos, Barry J. O'Sullivan, Yusuke Higashi, Adrian Vaisman Chasin, Jacopo Franco, Hiroaki Arimura, J. Ganguly, Elena Capogreco, Alessio Spessot, N. Horiguchi:
Side and Corner Region Non-Uniformities in Grown SiO2 and Their Implications on Current, Capacitance and Breakdown Characteristics. IRPS 2024: 36 - 2022
- [c4]Laurent Breuil, L. Nyns, S. Rachidi, K. Banerjee, Antonio Arreghini, J. P. Bastos, S. Ramesh, Geert Van den Bosch, Maarten Rosmeulen:
High-K incorporated in a SiON tunnel layer for 3D NAND programming voltage reduction. IMW 2022: 1-4 - [c3]Alessio Spessot, Shairfe Muhammad Salahuddin, Ricardo Escobar, Romain Ritzenthaler, Yang Xiang, Rahul Budhwani, Eugenio Dentoni Litta, Elena Capogreco, Joao P. Bastos, Yangyin Chen, Naoto Horiguchi:
Thermally stable, packaged aware LV HKMG platforms benchmark to enable low power I/O for next 3D NAND generations. IMW 2022: 1-4 - [c2]J. P. Bastos, Barry J. O'Sullivan, Jacopo Franco, Stanislav Tyaginov, Brecht Truijen, Adrian Vaisman Chasin, Robin Degraeve, Ben Kaczer, Romain Ritzenthaler, Elena Capogreco, E. Dentoni Litta, Alessio Spessot, Yusuke Higashi, Y. Yoon, V. Machkaoutsan, Pierre Fazan, N. Horiguchi:
Bias Temperature Instability (BTI) of High-Voltage Devices for Memory Periphery. IRPS 2022: 1-6 - [c1]Romain Ritzenthaler, Elena Capogreco, E. Dupuy, Hiroaki Arimura, J. P. Bastos, P. Favia, F. Sebaai, D. Radisic, V. T. H. Nguyen, G. Mannaert, B. T. Chan, V. Machkaoutsan, Y. Yoon, H. Itokawa, M. Yamaguchi, Y. Chen, Pierre Fazan, S. Subramanian, Alessio Spessot, E. Dentoni Litta, S. Samavedam, Naoto Horiguchi:
High Performance Thermally Resistant FinFETs DRAM Peripheral CMOS FinFETs with VTH Tunability for Future Memories. VLSI Technology and Circuits 2022: 306-307
Coauthor Index
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