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2010 – 2019
- 2018
[j5]Antonio Pullini, Francesco Conti
, Davide Rossi, Igor Loi, Michael Gautschi, Luca Benini:
A Heterogeneous Multicore System on Chip for Energy Efficient Brain Inspired Computing. IEEE Trans. Circuits Syst. II Express Briefs 65-II(8): 1094-1098 (2018)- 2017
- [b1]Michael Gautschi:
Design of energy-efficient processing elements for near-threshold parallel computing. ETH Zurich, Zürich, Switzerland, Hartung-Gorre Verlag 2017, ISBN 978-3-86628-595-8, pp. 1-177 - [j4]Michael Gautschi, Michael Schaffner, Frank K. Gürkaynak, Luca Benini:
An Extended Shared Logarithmic Unit for Nonlinear Function Kernel Acceleration in a 65-nm CMOS Multicore Cluster. IEEE J. Solid State Circuits 52(1): 98-112 (2017) - [j3]Davide Rossi, Antonio Pullini, Igor Loi, Michael Gautschi, Frank Kagan Gürkaynak, Adam Teman, Jeremy Constantin, Andreas Burg, Ivan Miro Panades, Edith Beigné, Fabien Clermidy, Philippe Flatresse, Luca Benini:
Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster. IEEE Micro 37(5): 20-31 (2017) - [j2]Francesco Conti, Robert Schilling, Pasquale Davide Schiavone, Antonio Pullini, Davide Rossi, Frank Kagan Gürkaynak, Michael Muehlberghuber, Michael Gautschi, Igor Loi, Germain Haugou, Stefan Mangard, Luca Benini:
An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(9): 2481-2494 (2017) - [j1]Michael Gautschi, Pasquale Davide Schiavone, Andreas Traber, Igor Loi, Antonio Pullini, Davide Rossi, Eric Flamand, Frank K. Gürkaynak, Luca Benini:
Near-Threshold RISC-V Core With DSP Extensions for Scalable IoT Endpoint Devices. IEEE Trans. Very Large Scale Integr. Syst. 25(10): 2700-2713 (2017) - [c13]Lei Li, Michael Gautschi, Luca Benini:
Approximate DIV and SQRT instructions for the RISC-V ISA: An efficiency vs. accuracy analysis. PATMOS 2017: 1-8 - [c12]Pasquale Davide Schiavone, Francesco Conti, Davide Rossi, Michael Gautschi, Antonio Pullini, Eric Flamand, Luca Benini:
Slow and steady wins the race? A comparison of ultra-low-power RISC-V cores for Internet-of-Things applications. PATMOS 2017: 1-8 - 2016
- [c11]Michael Schaffner, Michael Gautschi, Frank K. Gürkaynak, Luca Benini:
Accuracy and Performance Trade-Offs of Logarithmic Number Units in Multi-Core Clusters. ARITH 2016: 95-103 - [c10]Davide Rossi, Antonio Pullini, Igor Loi, Michael Gautschi, Frank Kagan Gürkaynak, Adam Teman, Jeremy Constantin, Andreas Burg, Ivan Miro Panades, Edith Beigné, Fabien Clermidy, Fady Abouzeid, Philippe Flatresse, Luca Benini:
193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing. COOL Chips 2016: 1-3 - [c9]Youri Popoff, Florian Scheidegger, Michael Schaffner, Michael Gautschi, Frank K. Gürkaynak, Luca Benini:
High-efficiency logarithmic number unit design based on an improved cotransformation scheme. DATE 2016: 1387-1392 - [c8]Vincent Camus, Jeremy Schlachter, Christian C. Enz, Michael Gautschi, Frank K. Gürkaynak:
Approximate 32-bit floating-point unit design with 53% power-area product reduction. ESSCIRC 2016: 465-468 - [c7]Antonio Pullini, Francesco Conti, Davide Rossi, Igor Loi, Michael Gautschi, Luca Benini:
A heterogeneous multi-core system-on-chip for energy efficient brain inspired vision. ISCAS 2016: 2910 - [c6]Michael Gautschi, Michael Schaffner, Frank K. Gürkaynak, Luca Benini:
4.6 A 65nm CMOS 6.4-to-29.2pJ/FLOP@0.8V shared logarithmic floating point unit for acceleration of nonlinear function kernels in a tightly coupled processor cluster. ISSCC 2016: 82-83 - [i2]Michael Gautschi, Pasquale Davide Schiavone, Andreas Traber, Igor Loi, Antonio Pullini, Davide Rossi, Eric Flamand, Frank K. Gürkaynak, Luca Benini:
A near-threshold RISC-V core with DSP extensions for scalable IoT Endpoint Devices. CoRR abs/1608.08376 (2016) - [i1]Francesco Conti, Robert Schilling, Pasquale Davide Schiavone, Antonio Pullini, Davide Rossi, Frank Kagan Gürkaynak, Michael Muehlberghuber, Michael Gautschi, Igor Loi, Germain Haugou, Stefan Mangard, Luca Benini:
An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics. CoRR abs/1612.05974 (2016) - 2015
- [c5]Igor Loi, Davide Rossi, Germain Haugou, Michael Gautschi, Luca Benini:
Exploring multi-banked shared-L1 program cache on ultra-low power, tightly coupled processor clusters. Conf. Computing Frontiers 2015: 64:1-64:8 - [c4]Davide Rossi, Francesco Conti, Andrea Marongiu, Antonio Pullini, Igor Loi, Michael Gautschi, Giuseppe Tagliavini, Alessandro Capotondi, Philippe Flatresse, Luca Benini:
PULP: A parallel ultra low power platform for next generation IoT applications. Hot Chips Symposium 2015: 1-39 - [c3]Michael Gautschi, Andreas Traber, Antonio Pullini, Luca Benini, Michele Scandale, Alessandro Di Federico, Michele Beretta, Giovanni Agosta:
Tailoring instruction-set extensions for an ultra-low power tightly-coupled cluster of OpenRISC cores. VLSI-SoC 2015: 25-30 - 2014
- [c2]Michael Gautschi, Michael Muehlberghuber, Andreas Traber, Sven Stucki, Matthias Baer, Renzo Andri, Luca Benini, Beat Muheim, Hubert Kaeslin:
SIR10US: A tightly coupled elliptic-curve cryptography co-processor for the OpenRISC. ASAP 2014: 25-29 - [c1]Michael Gautschi, Davide Rossi, Luca Benini:
Customizing an open source processor to fit in an ultra-low power cluster with a shared L1 memory. ACM Great Lakes Symposium on VLSI 2014: 87-88
Coauthor Index
aka: Frank Kagan Gürkaynak
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