default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDLuca G. Amarù
Luca Gaetano Amarù
Person information
- affiliation: Synopsys Inc, Mountain View, CA, USA
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
Books and Theses
- 2015
[b1]Luca Gaetano Amarù:
New Data Structures and Algorithms for Logic Synthesis and Verification. EPFL, Switzerland, 2015
Journal Articles
- 2020
- [j10]Eleonora Testa
, Luca G. Amarù, Mathias Soeken, Alan Mishchenko, Patrick Vuillod, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Extending Boolean Methods for Scalable Logic Synthesis. IEEE Access 8: 226828-226844 (2020) - 2019
- [j9]Eleonora Testa, Mathias Soeken, Luca Gaetano Amarù, Giovanni De Micheli:
Logic Synthesis for Established and Emerging Computing. Proc. IEEE 107(1): 165-184 (2019) - [j8]Eleonora Testa, Mathias Soeken, Luca Gaetano Amarù, Winston Haaswijk, Giovanni De Micheli:
Mapping Monotone Boolean Functions into Majority. IEEE Trans. Computers 68(5): 791-797 (2019) - 2017
- [j7]Mathias Soeken, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Exact Synthesis of Majority-Inverter Graphs and Its Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(11): 1842-1855 (2017) - 2016
- [j6]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Anupam Chattopadhyay, Giovanni De Micheli:
A Sound and Complete Axiomatization of Majority-n Logic. IEEE Trans. Computers 65(9): 2889-2895 (2016) - [j5]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Majority-Inverter Graph: A New Paradigm for Logic Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(5): 806-819 (2016) - 2015
- [j4]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Subhasish Mitra, Giovanni De Micheli:
New Logic Synthesis as Nanotechnology Enabler. Proc. IEEE 103(11): 2168-2195 (2015) - 2014
- [j3]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Biconditional Binary Decision Diagrams: A Novel Canonical Logic Representation Form. IEEE J. Emerg. Sel. Topics Circuits Syst. 4(4): 487-500 (2014) - 2013
- [j2]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Jian Zhang, Giovanni De Micheli:
Power-Gated Differential Logic Style Based on Double-Gate Controllable-Polarity Transistors. IEEE Trans. Circuits Syst. II Express Briefs 60-II(10): 672-676 (2013) - 2012
- [j1]Luca Gaetano Amarù, Maurizio Martina, Guido Masera:
High Speed Architectures for Finding the First two Maximum/Minimum Values. IEEE Trans. Very Large Scale Integr. Syst. 20(12): 2342-2346 (2012)
Conference and Workshop Papers
- 2024
- [c60]Dewmini Sudara Marakkalage, Eleonora Testa, Walter Lau Neto, Alan Mishchenko, Giovanni De Micheli, Luca G. Amarù:
Scalable Sequential Optimization Under Observability Don't Cares. DATE 2024: 1-6 - 2022
- [c59]Walter Lau Neto, Luca G. Amarù, Vinicius Possani, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Pierre-Emmanuel Gaillardon:
Improving LUT-based optimization for ASICs. DAC 2022: 421-426 - [c58]Giulia Meuli, Vinicius N. Possani, Rajinder Singh, Siang-Yun Lee, Alessandro Tempia Calvino, Dewmini Sudara Marakkalage, Patrick Vuillod, Luca G. Amarù, Scott Chase, Jamil Kawa, Giovanni De Micheli:
Majority-based Design Flow for AQFP Superconducting Family. DATE 2022: 34-39 - 2021
- [c57]Walter Lau Neto, Matheus Trevisan Moreira, Luca G. Amarù, Cunxi Yu, Pierre-Emmanuel Gaillardon:
Read your Circuit: Leveraging Word Embedding to Guide Logic Optimization. ASP-DAC 2021: 530-535 - [c56]Walter Lau Neto, Matheus T. Moreira, Yingjie Li, Luca G. Amarù, Cunxi Yu, Pierre-Emmanuel Gaillardon:
SLAP: A Supervised Learning Approach for Priority Cuts Technology Mapping. DAC 2021: 859-864 - [c55]Luca Gaetano Amarù, Vinicius N. Possani, Eleonora Testa, Felipe S. Marranghello, Christopher Casares, Jiong Luo, Patrick Vuillod, Alan Mishchenko, Giovanni De Micheli:
LUT-Based Optimization For ASIC Design Flow. DAC 2021: 871-876 - [c54]He-Teng Zhang, Jie-Hong R. Jiang, Luca G. Amarù, Alan Mishchenko, Robert K. Brayton:
Deep Integration of Circuit Simulator and SAT Solver. DAC 2021: 877-882 - 2020
- [c53]Luca G. Amarù, Felipe S. Marranghello, Eleonora Testa, Christopher Casares, Vinicius N. Possani, Jiong Luo, Patrick Vuillod, Alan Mishchenko, Giovanni De Micheli:
SAT-Sweeping Enhanced for Logic Synthesis. DAC 2020: 1-6 - [c52]Eleonora Testa, Mathias Soeken, Heinz Riener, Luca G. Amarù, Giovanni De Micheli:
A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks. DATE 2020: 568-573 - [c51]Max Austin, Scott Temple, Walter Lau Neto, Luca G. Amarù, Xifan Tang, Pierre-Emmanuel Gaillardon:
A Scalable Mixed Synthesis Framework for Heterogeneous Networks. DATE 2020: 670-673 - 2019
- [c50]Heinz Riener, Eleonora Testa, Winston Haaswijk, Alan Mishchenko, Luca G. Amarù, Giovanni De Micheli, Mathias Soeken:
Scalable Generic Logic Synthesis: One Approach to Rule Them All. DAC 2019: 70 - [c49]Eleonora Testa, Mathias Soeken, Luca G. Amarù, Giovanni De Micheli:
Reducing the Multiplicative Complexity in Logic Networks for Cryptography and Security Applications. DAC 2019: 74 - [c48]Eleonora Testa, Luca G. Amarù, Mathias Soeken, Alan Mishchenko, Patrick Vuillod, Jiong Luo, Christopher Casares, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Scalable Boolean Methods in a Modern Synthesis Flow. DATE 2019: 1643-1648 - [c47]Walter Lau Neto, Max Austin, Scott Temple, Luca G. Amarù, Xifan Tang, Pierre-Emmanuel Gaillardon:
LSOracle: a Logic Synthesis Framework Driven by Artificial Intelligence: Invited Paper. ICCAD 2019: 1-6 - [c46]Walter Lau Neto, Xifan Tang, Max Austin, Luca G. Amarù, Pierre-Emmanuel Gaillardon:
Improving Logic Optimization in Sequential Circuits using Majority-inverter Graphs. ISVLSI 2019: 224-229 - [c45]Heinz Riener, Eleonora Testa, Winston Haaswijk, Alan Mishchenko, Luca G. Amarù, Giovanni De Micheli, Mathias Soeken:
Logic Optimization of Majority-Inverter Graphs. MBMV 2019: 1-4 - 2018
- [c44]Alan Mishchenko, Robert K. Brayton, Ana Petkovska, Mathias Soeken, Luca G. Amarù, Antun Domic:
Canonical computation without canonical representation. DAC 2018: 52:1-52:6 - [c43]Mathias Soeken, Winston Haaswijk, Eleonora Testa, Alan Mishchenko, Luca Gaetano Amarù, Robert K. Brayton, Giovanni De Micheli:
Practical exact synthesis. DATE 2018: 309-314 - [c42]Luca Gaetano Amarù, Mathias Soeken, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Janet Olson, Robert K. Brayton, Giovanni De Micheli:
Improvements to boolean resynthesis. DATE 2018: 755-760 - [c41]Debjyoti Bhattacharjee, Luca G. Amarù, Anupam Chattopadhyay:
Technology-aware logic synthesis for ReRAM based in-memory computing. DATE 2018: 1435-1440 - [c40]Luca G. Amarù, Eleonora Testa, Miguel Couceiro, Odysseas Zografos, Giovanni De Micheli, Mathias Soeken:
Majority logic synthesis. ICCAD 2018: 79 - [c39]Winston Haaswijk, Luca Gaetano Amarù, Patrick Vuillod, Jiong Luo, Mathias Soeken, Giovanni De Micheli:
Integrated ESOP Refactoring for Industrial Designs. ICECS 2018: 369-372 - [c38]Heinz Riener, Eleonora Testa, Luca G. Amarù, Mathias Soeken, Giovanni De Micheli:
Size Optimization of MIGs with an Application to QCA and STMG Technologies. NANOARCH 2018: 157-162 - 2017
- [c37]Winston Haaswijk, Mathias Soeken, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
A novel basis for logic rewriting. ASP-DAC 2017: 151-156 - [c36]Luca Gaetano Amarù, Mathias Soeken, Winston Haaswijk, Eleonora Testa, Patrick Vuillod, Jiong Luo, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Multi-level logic benchmarks: An exactness study. ASP-DAC 2017: 157-162 - [c35]Luca Gaetano Amarù, Patrick Vuillod, Jiong Luo, Janet Olson:
Logic optimization and synthesis: Trends and directions in industry. DATE 2017: 1303-1305 - [c34]Odysseas Zografos, A. De Meester, Eleonora Testa, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Luca Gaetano Amarù, Praveen Raghavan, Francky Catthoor, Rudy Lauwereins:
Wave pipelining for majority-based beyond-CMOS technologies. DATE 2017: 1306-1311 - [c33]Zhufei Chu, Xifan Tang, Mathias Soeken, Ana Petkovska, Grace Zgheib, Luca Gaetano Amarù, Yinshui Xia, Paolo Ienne, Giovanni De Micheli, Pierre-Emmanuel Gaillardon:
Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains. ACM Great Lakes Symposium on VLSI 2017: 131-136 - [c32]Luca Gaetano Amarù, Mathias Soeken, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Pierre-Emmanuel Gaillardon, Janet Olson, Robert K. Brayton, Giovanni De Micheli:
Enabling exact delay synthesis. ICCAD 2017: 352-359 - 2016
- [c31]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Majority-based synthesis for nanotechnologies. ASP-DAC 2016: 499-502 - [c30]Mathias Soeken, Saeideh Shirinzadeh, Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Rolf Drechsler, Giovanni De Micheli:
An MIG-based compiler for programmable logic-in-memory architectures. DAC 2016: 117:1-117:6 - [c29]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Robert Wille, Giovanni De Micheli:
Exploiting inherent characteristics of reversible circuits for faster combinational equivalence checking. DATE 2016: 175-180 - [c28]Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Anne Siemon, Eike Linn, Rainer Waser, Anupam Chattopadhyay, Giovanni De Micheli:
The Programmable Logic-in-Memory (PLiM) computer. DATE 2016: 427-432 - [c27]Mathias Soeken, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Optimizing Majority-Inverter Graphs with functional hashing. DATE 2016: 1030-1035 - [c26]Pierre-Emmanuel Gaillardon, Mehdi Hasan, Anirban Saha, Luca Gaetano Amarù, Ross Walker, Berardi Sensale Rodriguez:
Digital, analog and RF design opportunities of three-independent-gate transistors. ISCAS 2016: 405-408 - [c25]Anupam Chattopadhyay, Luca Gaetano Amarù, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Notes on Majority Boolean Algebra. ISMVL 2016: 50-55 - [c24]Pierre-Emmanuel Gaillardon, Romain Magni, Luca Gaetano Amarù, Mehdi Hasan, Ross Walker, Berardi Sensale Rodriguez, Jean-Frédéric Christmann, Edith Beigné:
Three-Independent-Gate Transistors: Opportunities in digital, analog and RF applications. LATS 2016: 195-200 - [c23]Eleonora Testa, Mathias Soeken, Odysseas Zografos, Luca Gaetano Amarù, Praveen Raghavan, Rudy Lauwereins, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Inversion optimization in Majority-Inverter Graphs. NANOARCH 2016: 15-20 - 2015
- [c22]Luca Gaetano Amarù, Gage Hills, Pierre-Emmanuel Gaillardon, Subhasish Mitra, Giovanni De Micheli:
Multiple Independent Gate FETs: How many gates do we need? ASP-DAC 2015: 243-248 - [c21]Pierre-Emmanuel Gaillardon, Gain Kim, Xifan Tang, Luca Gaetano Amarù, Giovanni De Micheli:
Towards More Efficient Logic Blocks By Exploiting Biconditional Expansion (Abstract Only). FPGA 2015: 262 - [c20]Sandeep Miryala, Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino, Luca Gaetano Amarù, Giovanni De Micheli, Pierre-Emmanuel Gaillardon:
Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization. ACM Great Lakes Symposium on VLSI 2015: 39-44 - [c19]Anupam Chattopadhyay, Alessandro Littarru, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Reversible Logic Synthesis via Biconditional Binary Decision Diagrams. ISMVL 2015: 2-7 - [c18]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Maciej J. Ciesielski, Giovanni De Micheli:
Exploiting Circuit Duality to Speed up SAT. ISVLSI 2015: 101-106 - [c17]Johan Broc, Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Jaume Joven Murillo, Krishna V. Palem, Giovanni De Micheli:
A fast pruning technique for low-power inexact Circuit design. LASCAS 2015: 1-4 - [c16]Winston Haaswijk, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
NEM relay design with biconditional binary decision diagrams. NANOARCH 2015: 45-50 - 2014
- [c15]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Andreas Burg, Giovanni De Micheli:
Data compression via logic synthesis. ASP-DAC 2014: 628-633 - [c14]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Majority-Inverter Graph: A Novel Data-Structure and Algorithms for Efficient Logic Optimization. DAC 2014: 194:1-194:6 - [c13]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
An efficient manipulation package for Biconditional Binary Decision Diagrams. DATE 2014: 1-6 - [c12]Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Jian Zhang, Giovanni De Micheli:
Advanced system on a chip design based on controllable-polarity FETs. DATE 2014: 1-6 - [c11]Odysseas Zografos, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Praveen Raghavan, Giovanni De Micheli:
Majority Logic Synthesis for Spin Wave Technology. DSD 2014: 691-694 - [c10]Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Giovanni De Micheli:
A new basic logic structure for data-path computation (abstract only). FPGA 2014: 241 - [c9]Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Giovanni De Micheli:
Unlocking Controllable-Polarity Transistors Opportunities by Exclusive-OR and Majority Logic Synthesis. ISVLSI 2014: 403-405 - [c8]Odysseas Zografos, Praveen Raghavan, Luca Gaetano Amarù, Bart Soree, Rudy Lauwereins, Iuliana P. Radu, Diederik Verkest, Aaron Thean:
System-level assessment and area evaluation of Spin Wave logic circuits. NANOARCH 2014: 25-30 - 2013
- [c7]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
MIXSyn: An efficient logic synthesis methodology for mixed XOR-AND/OR dominated circuits. ASP-DAC 2013: 133-138 - [c6]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
BDS-MAJ: a BDD-based logic synthesis tool exploiting majority logic decomposition. DAC 2013: 47:1-47:6 - [c5]Pierre-Emmanuel Gaillardon, Michele De Marchi, Luca Gaetano Amarù, Shashikanth Bobba, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli:
Towards structured ASICs using polarity-tunable Si nanowire transistors. DAC 2013: 123:1-123:4 - [c4]Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Shashikanth Bobba, Michele De Marchi, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli:
Vertically-stacked double-gate nanowire FETs with controllable polarity: from devices to regular ASICs. DATE 2013: 625-630 - [c3]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Biconditional BDD: a novel canonical BDD for logic synthesis targeting XOR-rich circuits. DATE 2013: 1014-1017 - [c2]Ogun Turkyilmaz, Fabien Clermidy, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Self-checking ripple-carry adder with Ambipolar Silicon NanoWire FET. ISCAS 2013: 2127-2130 - 2011
- [c1]Stefano Frache, Luca Gaetano Amarù, Mariagrazia Graziano, Maurizio Zamboni:
Nanofabric power analysis: Biosequence alignment case study. NANOARCH 2011: 91-98
Informal and Other Publications
- 2023
- [i3]Dewmini Sudara Marakkalage, Eleonora Testa, Walter Lau Neto, Alan Mishchenko, Giovanni De Micheli, Luca G. Amarù:
Scalable Sequential Optimization Under Observability Don't Cares. CoRR abs/2311.09967 (2023) - 2020
- [i2]Eleonora Testa, Mathias Soeken, Heinz Riener, Luca G. Amarù, Giovanni De Micheli:
A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks. IACR Cryptol. ePrint Arch. 2020: 706 (2020) - 2015
- [i1]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Anupam Chattopadhyay, Giovanni De Micheli:
A Sound and Complete Axiomatization of Majority-n Logic. CoRR abs/1502.06359 (2015)
Coauthor Index
[j10] [j9] [j8] [j7] [j6] [j5] [j4] [j3] [j2] [c60] [c58] [c55] [c53] [c52] [c50] [c49] [c48] [c45] [c43] [c42] [c40] [c39] [c38] [c37] [c36] [c34] [c33] [c32] [c31] [c30] [c29] [c28] [c27] [c25] [c23] [c22] [c21] [c20] [c19] [c18] [c17] [c16] [c15] [c14] [c13] [c12] [c11] [c10] [c9] [c7] [c6] [c5] [c4] [c3] [c2] [i3] [i2] [i1]
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-10-01 21:38 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
