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Aritra Hazra
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2020 – today
- 2024
- [j19]Durba Chatterjee
, Kuheli Pratihar
, Aritra Hazra
, Ulrich Rührmair, Debdeep Mukhopadhyay
:
Systematically Quantifying Cryptanalytic Nonlinearities in Strong PUFs. IEEE Trans. Inf. Forensics Secur. 19: 1126-1141 (2024) - [c26]Sourav Das, Aritra Hazra, Pallab Dasgupta, Sudipta Kundu, Himanshu Jain:
PURSE: Property Ordering Using Runtime Statistics for Efficient Multi - Property Verification. DATE 2024: 1-6 - [i13]Sabariswaran Mani, Abhranil Chandra, Sreyas Venkataraman, Adyan Rizvi, Yash Sirvi, Soumojit Bhattacharya, Aritra Hazra:
DiffClone: Enhanced Behaviour Cloning in Robotics with Diffusion-Driven Policy Learning. CoRR abs/2401.09243 (2024) - 2023
- [j18]Sourav Das
, Sayandeep Sanyal
, Aritra Hazra
, Pallab Dasgupta
:
CoVerPlan: A Comprehensive Verification Planning Framework Leveraging PSS Specifications. ACM Trans. Design Autom. Electr. Syst. 28(1): 9:1-9:32 (2023) - [c25]Sayandeep Sanyal, Aritra Hazra, Pallab Dasgupta, Scott Morrison, Sudhakar Surendran, Lakshmanan Balasubramanian, Mohammad Moshiur Rahman:
Analog Coverage-driven Selection of Simulation Corners for AMS Integrated Circuits. DATE 2023: 1-6 - [c24]Km Poonam, Aayush Prasad, Rajlakshmi Guha, Aritra Hazra, P. P. Chakrabarti:
Explainable Decision Tree-Based Screening of Cognitive Impairment Leveraging Minimal Neuropsychological Tests. PReMI 2023: 241-251 - 2022
- [j17]Sayandeep Sanyal
, Pallab Dasgupta
, Aritra Hazra
, Sourav Das
, Scott Morrison, Sudhakar Surendran, Lakshmanan Balasubramanian:
The CoveRT Approach for Coverage Management in Analog and Mixed-Signal Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(12): 5695-5708 (2022) - [j16]Durba Chatterjee, Harishma Boyapally, Sikhar Patranabis, Urbi Chatterjee, Aritra Hazra, Debdeep Mukhopadhyay:
Physically Related Functions: Exploiting Related Inputs of PUFs for Authenticated-Key Exchange. IEEE Trans. Inf. Forensics Secur. 17: 3847-3862 (2022) - [c23]Ayan Chakraborty
, Sayandeep Sanyal, Pallab Dasgupta, Aritra Hazra, Scott Morrison, Sudhakar Surendran, Lakshmanan Balasubramanian:
Tracking Coverage Artefacts for Periodic Signals using Sequence-based Abstractions. VLSID 2022: 132-137 - [i12]Kushal Kedia, Rajat Kumar Jenamani, Aritra Hazra, Partha Pratim Chakrabarti:
Optimal Multi-Agent Path Finding for Precedence Constrained Planning Tasks. CoRR abs/2202.10449 (2022) - [i11]Aritra Hazra:
Formal Methods for Characterization and Analysis of Quality Specifications in Component-based Systems. CoRR abs/2205.14586 (2022) - [i10]Dvij Kalaria, Aritra Hazra, Partha Pratim Chakrabarti:
Towards Adversarial Purification using Denoising AutoEncoders. CoRR abs/2208.13838 (2022) - [i9]Durba Chatterjee, Debdeep Mukhopadhyay, Aritra Hazra:
PAC Learnability of iPUF Variants. IACR Cryptol. ePrint Arch. 2022: 165 (2022) - [i8]Durba Chatterjee, Kuheli Pratihar, Aritra Hazra, Ulrich Rührmair, Debdeep Mukhopadhyay:
Systematically Quantifying Cryptanalytic Non-Linearities in Strong PUFs. IACR Cryptol. ePrint Arch. 2022: 1766 (2022) - 2021
- [j15]Sudipa Mandal
, Aritra Hazra
, Pallab Dasgupta
:
Usage-Driven Personalization of Power Management Logic. IEEE Embed. Syst. Lett. 13(3): 106-109 (2021) - [j14]Sunandan Adhikary
, Amit Gurung, Jay Thakkar, Antonio Anastasio Bruto da Costa, Soumyajit Dey
, Aritra Hazra
, Pallab Dasgupta
:
SMT-Based Verification of Safety-Critical Embedded Control Software. IEEE Embed. Syst. Lett. 13(3): 138-141 (2021) - [j13]Indrani Roy, Chester Rebeiro, Aritra Hazra, Swarup Bhunia
:
FaultDroid: An Algorithmic Approach for Fault-Induced Information Leakage Analysis. ACM Trans. Design Autom. Electr. Syst. 26(1): 2:1-2:27 (2021) - [c22]Durba Chatterjee, Urbi Chatterjee, Debdeep Mukhopadhyay, Aritra Hazra:
SACReD: An Attack Framework on SAC Resistant Delay-PUFs leveraging Bias and Reliability Factors. DAC 2021: 85-90 - [c21]Durba Chatterjee
, Debdeep Mukhopadhyay, Aritra Hazra:
Formal Analysis of Physically Unclonable Functions. VLSI-SoC 2021: 1-2 - [c20]Sudipa Mandal, Krushna Gaurkar, Pallab Dasgupta, Aritra Hazra:
An RL based Approach for Thermal-Aware Energy Optimized Task Scheduling in Multi-core Processors. VLSID 2021: 181-186 - [i7]Sayandeep Sanyal, Ayan Chakraborty, Pallab Dasgupta, Aritra Hazra:
Methodology for Biasing Random Simulation for Rapid Coverage of Corner Cases in AMS Designs. CoRR abs/2104.14785 (2021) - [i6]Dvij Kalaria, Aritra Hazra, Partha Pratim Chakrabarti:
Detecting Adversaries, yet Faltering to Noise? Leveraging Conditional Variational AutoEncoders for Adversary Detection in the Presence of Noisy Images. CoRR abs/2111.15518 (2021) - [i5]Durba Chatterjee, Harishma Boyapally, Sikhar Patranabis, Urbi Chatterjee, Debdeep Mukhopadhyay, Aritra Hazra:
Physically Related Functions: A New Paradigm for Light-weight Key-Exchange. IACR Cryptol. ePrint Arch. 2021: 389 (2021) - [i4]Durba Chatterjee, Debdeep Mukhopadhyay, Aritra Hazra:
Learnability of Multiplexer PUF and SN-PUF : A Fourier-based Approach. IACR Cryptol. ePrint Arch. 2021: 681 (2021) - 2020
- [j12]Indrani Roy
, Chester Rebeiro
, Aritra Hazra
, Swarup Bhunia
:
SAFARI: Automatic Synthesis of Fault-Attack Resistant Block Cipher Implementations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(4): 752-765 (2020) - [j11]Keerthi K., Indrani Roy, Chester Rebeiro, Aritra Hazra, Swarup Bhunia
:
FEDS: Comprehensive Fault Attack Exploitability Detection for Software Implementations of Block Ciphers. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2020(2): 272-299 (2020) - [j10]Sudipa Mandal
, Pallab Dasgupta
, Aritra Hazra
, Chunduri Rama Mohan:
Assertions for Protecting Mixed-Signal Latency Contracts in Power Management. IEEE Trans. Very Large Scale Integr. Syst. 28(8): 1745-1756 (2020) - [c19]Sayandeep Sanyal, Aritra Hazra, Pallab Dasgupta, Scott Morrison, Sudhakar Surendran, Lakshmanan Balasubramanian:
The Notion of Cross Coverage in AMS Design Verification. ASP-DAC 2020: 217-222 - [c18]Milind Srivastava, Patanjali SLPSK, Indrani Roy, Chester Rebeiro, Aritra Hazra, Swarup Bhunia
:
SOLOMON: An Automated Framework for Detecting Fault Attack Vulnerabilities in Hardware. DATE 2020: 310-313 - [c17]Durba Chatterjee
, Debdeep Mukhopadhyay, Aritra Hazra:
PUF-G: A CAD Framework for Automated Assessment of Provable Learnability from Formal PUF Representations. ICCAD 2020: 48:1-48:9 - [c16]Sayandeep Sanyal, Aritra Hazra, Pallab Dasgupta, Scott Morrison, Sudhakar Surendran, Lakshmanan Balasubramanian:
CoveRT: A Coverage Reporting Tool for Analog Mixed-Signal Designs. VLSID 2020: 119-124 - [i3]Ginju V. George, Aritra Hazra, Pallab Dasgupta, Partha Pratim Chakrabarti:
Early-Stage Resource Estimation from Functional Reliability Specification in Embedded Cyber-Physical Systems. CoRR abs/2005.00995 (2020) - [i2]Durba Chatterjee, Debdeep Mukhopadhyay, Aritra Hazra:
Interpose PUF can be PAC Learned. IACR Cryptol. ePrint Arch. 2020: 471 (2020)
2010 – 2019
- 2019
- [c15]Durba Chatterjee
, Aritra Hazra, Debdeep Mukhopadhyay:
Formal Analysis of PUF Instances Leveraging Correlation-Spectra in Boolean Functions. SPACE 2019: 142-158 - [p1]Keerthi K., Indrani Roy, Aritra Hazra, Chester Rebeiro:
Formal Verification for Security in IoT Devices. Security and Fault Tolerance in Internet of Things 2019: 179-200 - 2018
- [j9]Keerthi K., Chester Rebeiro, Aritra Hazra:
An Algorithmic Approach to Formally Verify an ECC Library. ACM Trans. Design Autom. Electr. Syst. 23(5): 63:1-63:26 (2018) - [c14]Sudipa Mandal, Aritra Hazra, Pallab Dasgupta, Chunduri Rama Mohan:
Formal Methods for Coverage Analysis of Power Management Logic with Mixed-Signal Components. VLSID 2018: 37-42 - [i1]Durba Chatterjee, Aritra Hazra, Debdeep Mukhopadhyay:
Testability Analysis of PUFs Leveraging Correlation-Spectra in Boolean Functions. CoRR abs/1810.08821 (2018) - 2017
- [j8]Saurav Kumar Ghosh
, P. Vishnuvardhan, Satya Gautam Vadlamudi, Aritra Hazra, Soumyajit Dey, Partha Pratim Chakrabarti:
RELSPEC: a framework for reliability aware design of component based embedded systems. Des. Autom. Embed. Syst. 21(1): 37-87 (2017) - [c13]Punit Khanna, Chester Rebeiro
, Aritra Hazra:
XFC: A Framework for eXploitable Fault Characterization in Block Ciphers. DAC 2017: 8:1-8:6 - [c12]Sudipa Mandal, Antonio Anastasio Bruto da Costa, Aritra Hazra, Pallab Dasgupta, Bhushan Naware, Chunduri Rama Mohan, Sanjib Basu:
Formal Verification of Power Management Logic with Mixed-Signal Domains. VLSID 2017: 239-244 - 2016
- [j7]Aritra Hazra, Pallab Dasgupta, Partha Pratim Chakrabarti:
Formal assessment of reliability specifications in embedded cyber-physical systems. J. Appl. Log. 18: 71-104 (2016) - [c11]Saurav Kumar Ghosh, Akash Mondal, Souradeep Dutta, Aritra Hazra, Soumyajit Dey:
Synthesis of scheduler automata guaranteeing stability and reliability of embedded control systems. VDAT 2016: 1-6 - 2015
- [c10]Saurav Kumar Ghosh, Aritra Hazra, Soumyajit Dey:
RELSPEC: A Framework for Early Reliability Refinement of Embedded Applications. VLSID 2015: 41-46 - 2014
- [c9]Rajorshee Raha, Aritra Hazra, Akash Mondal, Soumyajit Dey, Partha Pratim Chakrabarti, Pallab Dasgupta:
Synthesis of sampling modes for adaptive control. ICCSCE 2014: 294-299 - 2013
- [j6]Aritra Hazra, Priyankar Ghosh, Satya Gautam Vadlamudi, P. P. Chakrabarti, Pallab Dasgupta:
Formal Methods for Early Analysis of Functional Reliability in Component-Based Embedded Applications. IEEE Embed. Syst. Lett. 5(1): 8-11 (2013) - [j5]M. Santhosh Prabhu, Aritra Hazra, Pallab Dasgupta:
Reliability Guarantees in Automata-Based Scheduling for Embedded Control Software. IEEE Embed. Syst. Lett. 5(2): 17-20 (2013) - [j4]Aritra Hazra, Rajdeep Mukherjee, Pallab Dasgupta, Ajit Pal, Kevin Harer, Ansuman Banerjee, Subhankar Mukherjee:
POWER-TRUCTOR: An Integrated Tool Flow for Formal Verification and Coverage of Architectural Power Intent. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(11): 1801-1813 (2013) - [j3]Aritra Hazra, Sahil Goyal, Pallab Dasgupta, Ajit Pal:
Formal Verification of Architectural Power Intent. IEEE Trans. Very Large Scale Integr. Syst. 21(1): 78-91 (2013) - [c8]M. Santhosh Prabhu, Aritra Hazra, Pallab Dasgupta, Partha Pratim Chakrabarti:
Handling fault detection latencies in automata-based scheduling for embedded control software. CACSD 2013: 1-6 - 2012
- [j2]Aritra Hazra, Priyankar Ghosh, Pallab Dasgupta, Partha Pratim Chakrabarti:
Cohesive Coverage Management: Simulation Meets Formal Methods. J. Electron. Test. 28(4): 449-468 (2012) - [j1]Priyankar Ghosh, Aritra Hazra, Rahul Gonnabhaktula, Niraj Bhilegaonkar, Pallab Dasgupta, Chittaranjan A. Mandal, Krishna Paul:
POWER-SIM: An SOC Simulator for Estimating Power Profiles of Mobile Workloads. J. Low Power Electron. 8(3): 293-303 (2012) - [c7]Aritra Hazra, Pallab Dasgupta, Ansuman Banerjee, Kevin Harer:
Formal methods for coverage analysis of architectural power states in power-managed designs. ASP-DAC 2012: 585-590 - [c6]Aritra Hazra, Priyankar Ghosh, Pallab Dasgupta:
Reliability annotations to formal specifications of context-sensitive safety properties in embedded systems. FDL 2012: 36-43 - 2011
- [c5]Priyankar Ghosh, Aritra Hazra, Niraj Bhilegaonkar, Pallab Dasgupta, Chittaranjan A. Mandal, Krishna Paul:
POWER-SIM: An SOC Simulator for Estimating Power Profiles of Mobile Workloads. ISED 2011: 273-278 - 2010
- [c4]Aritra Hazra, Srobona Mitra, Pallab Dasgupta, Ajit Pal, Debabrata Bagchi, Kaustav Guha:
Leveraging UPF-extracted assertions for modeling and formal verification of architectural power intent. DAC 2010: 773-776 - [c3]Aritra Hazra, Priyankar Ghosh, Pallab Dasgupta, Partha Pratim Chakrabarti:
Coverage Management with Inline Assertions and Formal Test Points. VLSI Design 2010: 140-145
2000 – 2009
- 2009
- [c2]Aritra Hazra, Priyankar Ghosh, Pallab Dasgupta, Partha Pratim Chakrabarti:
Inline Assertions - Embedding Formal Properties in a Test Bench. VLSI Design 2009: 71-76 - 2008
- [c1]Aritra Hazra, Ansuman Banerjee, Srobona Mitra, Pallab Dasgupta, Partha Pratim Chakrabarti, Chunduri Rama Mohan:
Cohesive Coverage Management for Simulation and Formal Property Verification. ISVLSI 2008: 251-256
Coauthor Index
aka: Partha Pratim Chakrabarti
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