19th ISQED 2018: Santa Clara, California, USA

Keynote

Session 1A: Design Verification and Test

Session 1B: System-level Design and Methodologies (SDM)

Session 1C: Emerging Logic and Memory Technologies in IoT and Neuromorphic Architectures

Session 2A: Automated Analog and Digital Circuit Optimization

Session 2B: System-level Design and Methodologies (SDM)

Session 2C: Poster Papers

Session 3A.1: Design Verification and Test

Session 3A.2: Automated Analog and Digital Circuit Optimization

Session 3B: High Performance / Low Power Logic Design

Session 3C: IoT and Smart Sensors

Session 4A.1: Design Technology Co-Optimization

Session 4A.2: Machine Learning on Conventional and Emerging Platforms

Session 4B: High Performance / Low Power Logic Design

Session 4C: IoT & Smart Sensors

Session 5A: Machine Learning on Conventional and Emerging Platforms

Session 5B: Hardware Security: PUF, Obfuscation, and Trojan Detection

Session 5C: Demystifying Self-driving Cars

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