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Kamlesh Singh
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2020 – today
- 2023
- [j5]Shima Sedighiani
, Kamlesh Singh, Roel Jordans, Pieter Harpe
, José Pineda de Gyvez
:
A 380 fW Leakage Data Retention Flip-Flop for Short Sleep Periods. IEEE Trans. Circuits Syst. II Express Briefs 70(7): 2650-2654 (2023) - 2021
- [j4]Barry de Bruin
, Kamlesh Singh
, Ying Wang
, Jos Huisken
, José Pineda de Gyvez
, Henk Corporaal
:
Multi-Level Optimization of an Ultra-Low Power BrainWave System for Non-Convulsive Seizure Detection. IEEE Trans. Biomed. Circuits Syst. 15(5): 1107-1121 (2021) - [j3]Kamlesh Singh
, José Pineda de Gyvez
:
Twenty Years of Near/Sub-Threshold Design Trends and Enablement. IEEE Trans. Circuits Syst. II Express Briefs 68(1): 5-11 (2021) - [j2]Kamlesh Singh
, Barry de Bruin
, Hailong Jiao
, Jos Huisken
, Henk Corporaal
, José Pineda de Gyvez
:
Converter-Free Power Delivery Using Voltage Stacking for Near/Subthreshold Operation. IEEE Trans. Very Large Scale Integr. Syst. 29(6): 1039-1051 (2021) - [c9]Shima Sedighiani, Kamlesh Singh, Roel Jordans, Pieter Harpe:
Management of Unpredictable Harvested-Energy IoT Devices. ICECS 2021: 1-6 - [c8]Shima Sedighiani, Kamlesh Singh, Roel Jordans, Pieter Harpe, José Pineda de Gyvez:
A Low Power Fully-Digital Multi-Level Voltage Monitor Operating in a Wide Voltage Range for Energy Harvesting IoT. ISQED 2021: 13-18 - 2020
- [c7]Jinbo Zhou, Kamlesh Singh, Jos Huisken
:
Standard Cell based Memory Compiler for Near/Sub-threshold Operation. ICECS 2020: 1-4 - [c6]Barry de Bruin
, Kamlesh Singh, Jos Huisken
, Henk Corporaal:
BrainWave: an energy-efficient EEG monitoring system - evaluation and trade-offs. ISLPED 2020: 181-186 - [c5]Shima Sedighiani, Kamlesh Singh, Jos Huisken
, Roel Jordans, Pieter Harpe, José Pineda de Gyvez:
An Electromagnetic Energy Harvester and Power Management in 28-nm FDSOI for IoT. MECO 2020: 1-5
2010 – 2019
- 2019
- [c4]Kamlesh Singh, Barry de Bruin
, Jos Huisken
, Hailong Jiao, José Pineda de Gyvez:
Voltage Stacked Design of a Microcontroller for Near/Sub-threshold Operation. SoCC 2019: 370-375 - 2018
- [j1]Kamlesh Singh
:
Analysis and Modeling of Chopping Phase Non-Overlap in Continuous-Time ΔΣ Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3216-3226 (2018) - [c3]Kamlesh Singh, Omar Alejandro Rodriguez Rosas, Hailong Jiao, Jos Huisken
, José Pineda de Gyvez:
Multi-Bit Pulsed-Latch Based Low Power Synchronous Circuit Design. ISCAS 2018: 1-5 - [c2]Kamlesh Singh, Hailong Jiao, Jos Huisken
, Hamed Fatemi, José Pineda de Gyvez:
Low power latch based design with smart retiming. ISQED 2018: 329-334 - 2016
- [c1]Kamlesh Singh
, Shanthi Pavan:
A 14 Bit Dual Channel Incremental Continuous-Time Delta Sigma Modulator for Multiplexed Data Acquisition. VLSID 2016: 230-235
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