SoCC 2010:
Las Vegas, NV, USAThomas Büchner , Ramalingam Sridhar , Andrew Marshall , Norbert Schuhmann (Eds.):
Annual IEEE International SoC Conference, SoCC 2010, September 27-29, 2010, Las Vegas, NV, USA, Proceedings.
IEEE 2010, ISBN 978-1-4244-6682-5 SoC Power Optimization Techniques
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Na Gong ,
Ramalingam Sridhar :
Optimization and predication of leakage current characteristics in wide domino OR gates under PVT variation.
19-24
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Analog 1
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Embedded Tutorial
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Low Power SoC Circuits
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Analog 2
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Embedded Tutorial
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Kaijian Shi :
Low-power SOC implementation: What you need to know.
95
Multimedia Processing
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System Level Design Methodologies
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Won Ha Choi ,
Xun Liu :
Case study: Runtime reduction of a buffer insertion algorithm using GPU parallel programming.
121-126
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Design
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System Level Design Methodologies
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Luncheon
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P. R. Mukund :
From Film to Silicon: The Migration of Document Archiving Technology.
205
Low Power Design
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Reconfigurable Systems
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Yuji Aoyama ,
Minoru Watanabe :
Estimation of characteristic variation of photodiodes and its compensation method in an optically reconfigurable gate array.
243-247
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Poster Session
Analog and Mixed Signals
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Kwang Yoon ,
Won Kim :
A CMOS 6 bit 250MS/s A/D converter with input voltage range detectors.
289-292
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Reconfigurable and Programmable Circuits and Systems, FPGAs
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Embedded Systems, Multi Core, and Embedded Memory
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conf/socc/ShamannaKGTMRN10 export record as
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Low Power
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Verification
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Multimedia Processing
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conf/socc/Jansz-DravetzkyHW10
Network on Chip and Interconnect
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System Level Design Methodology
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Plenary Session
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conf/socc/BrandstatterNH10 export record as
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Embedded Tutorial
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Lech Józwiak :
Quality-driven SoC architecture synthesis for embedded applications.
425-426
Network on Chip 1
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Ankit More ,
Baris Taskin :
Simulation based study of on-chip antennas for a reconfigurable hybrid 3D wireless NoC.
447-452
Embedded Memory and Systems 1
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Network on Chip 2
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Embedded Memory and Systems 2
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