ICCAD 2005:
San Jose, California, USA
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conf/iccad/Ruiz-SautuaMMH05 export record as
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Kwok-Shing Leung :
SPIDER: simultaneous post-layout IR-drop and metal density enhancement with redundant fill.
33-38
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Erkan Acar ,
Sule Ozev :
Parametric test development for RF circuits targeting physical fault locations and using specification-based fault definitions.
73-79
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conf/iccad/ChakrabartyC05 export record as
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conf/iccad/TakahashiCCDFHKMNOOPS05 Osamu Takahashi ,
Russ Cook ,
Scott R. Cottier ,
Sang H. Dhong ,
Brian K. Flachs ,
Koji Hirairi ,
Atsushi Kawasumi ,
Hiroaki Murakami ,
Hiromi Noro ,
Hwa-Joon Oh ,
S. Onish ,
Juergen Pille ,
Joel Silberman :
The circuit design of the synergistic processor element of a CELL processor.
111-117
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Richard McGowen :
Adaptive designs for power and thermal optimization.
118-121
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conf/iccad/StaszewskiML05 export record as
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Sanghamitra Roy ,
Weijen Chen :
ConvexFit: an optimal minimum-error convex fitting and smoothing algorithm with application to gate-sizing.
196-203
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Tsu-Jae King :
FinFETs for nanoscale CMOS digital integrated circuits.
207-210
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conf/iccad/TrivediFMCZWN05 export record as
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conf/iccad/RowlettePSPG05 export record as
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conf/iccad/SrinivasanCK05 export record as
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conf/iccad/ParthasarathyICB05 export record as
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Ruiming Chen ,
Hai Zhou :
Efficient algorithms for buffer insertion in general circuits based on network flow.
322-326
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Chuan Lin ,
Hai Zhou :
Trade-off between latch and flop for min-period sequential circuit designs with crosstalk.
329-334
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conf/iccad/KouroussisFN05 export record as
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conf/iccad/TsukamotoNIOOYMIS05 export record as
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conf/iccad/BernardinisV05 export record as
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Tamal Mukherjee :
Design automation issues for biofluidic microchips.
463-470
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conf/iccad/ChatterjeeMBWK05 export record as
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conf/iccad/ZhouYCZCHCSCS05 export record as
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conf/iccad/GhoneimaIKTD05 export record as
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Tamás Roska :
Cellular wave computers and CNN technology - a SoC architecture with xK processors and sensor arrays.
557-564
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conf/iccad/ChaudharyCWNR05 export record as
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conf/iccad/VenkataramanJHLKRMA05 export record as
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conf/iccad/BoianapallyMR05 export record as
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Peng Li :
Variational analysis of large power grids by exploring statistical sampling sharing and spatial locality.
645-651
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Chris Dwyer :
Computer-aided design for DNA self-assembly: process and applications.
662-667
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Zhenhai Zhu ,
Jacob K. White :
FastSies: a fast stochastic integral equation solver for modeling the rough surface effect.
675-682
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Mosin Mondal ,
Yehia Massoud :
Reducing pessimism in RLC delay estimation using an accurate analytical frequency dependent model for inductance.
691-696
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conf/iccad/VijayakumarB05 export record as
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Daniel L. Rosenband :
Hardware synthesis from guarded atomic actions with performance specifications.
784-791
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Xin Li ,
Peng Li ,
Lawrence T. Pileggi :
Parameterized interconnect order reduction with explicit-and-implicit multi-parameter moment matching for inter/intra-die variations.
806-812
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Debjit Sinha ,
Hai Zhou :
A unified framework for statistical timing analysis with coupling and multiple input switching.
837-843
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M. Frank Chang :
CDMA/FDMA-interconnects for future ULSI communications.
975-978
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conf/iccad/KennethKFMYHBDGLTCBBYBCSGSLYCHDHWZB05 K. O. Kenneth ,
Kihong Kim ,
Brian A. Floyd ,
Jesal L. Mehta ,
Hyun Yoon ,
Chih-Ming Hung ,
Daniel F. Bravo ,
Timothy O. Dickson ,
Xiaoling Guo ,
Ran Li ,
Narasimhan Trichy ,
James Caserta ,
Wayne R. Bomstad II ,
Jason Branch ,
Dong-Jun Yang ,
Jose L. Bohorquez ,
Jie Chen ,
Eunyoung Seok ,
Li Gao ,
Aravind Sugavanam ,
Jau-Jr Lin ,
S. Yu ,
Changhua Cao ,
M.-H. Hwang ,
Y.-R. Ding ,
S.-H. Hwang ,
H. Wu ,
N. Zhang ,
Joe E. Brewer :
The feasibility of on-chip interconnection using antennas.
979-984
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Ankur Agiwal ,
Montek Singh :
An architecture and a wrapper synthesis approach for multi-clock latency-insensitive systems.
1006-1013
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Montek Singh :
Memory access optimization of dynamic binary translation for reconfigurable architectures.
1014-1020
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