"An architecture and a wrapper synthesis approach for multi-clock ..."

Ankur Agiwal, Montek Singh (2005)

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DOI: 10.1109/ICCAD.2005.1560209

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Ankur Agiwal, Montek Singh:
An architecture and a wrapper synthesis approach for multi-clock latency-insensitive systems. ICCAD 2005: 1006-1013

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