Hai Zhou, Enrico Macii, Zhiyuan Yan, Yehia Massoud (Eds.):
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007.
ACM 2007, ISBN 978-1-59593-605-9
: Design challenges in 45nm and below: DFM, low-power and design for reliability.
Architecture and memory
Timing and power analysis
Test and reliability
Device, interconnect, and power optimization for nano-CMOS
Low power architecture and interconnect
Poster session 1
: A new approach to logic synthesis of multi-output boolean functions on pal-based CPLDS.
Circuits and logic
Emerging technologies for low power design
System level design
CMOS & logic applications optimization and techniques
Optimization and verification
Poster session 2
, Mineo Kaneko
: Extended register-sharing in the synthesis of dual-rail two-phase asynchronous datapath.
Arithmetic and coding
, Paul Chow
: Design of a versatile and cost-effective hybrid floating-point/LNS arithmetic processor.
, Jong-Soo Oh
: Multi-segment GF(2m) multiplication and its application to elliptic curve cryptography.
Routing and buffer insertion
Power estimation and modeling