19. FPL 2009: Prague, Czech Republic


Threads, MPI, Multi-CPU Systems

Practical Applications


GPU, CPU, FPGA Register Allocation

Partial Runtime Reconfiguration

Synthesis, Low Power

GPU, CPU, FPGA and Image Processing

Placement and Routing

Applications #1

Fault Toleance and Reliability

FPGA Architectures

Surveys, Trends


Interconnect (classical)

Image Processing Applications


Interconnect (NoC)

Application Acceleration #1

Applications #2

Cryptography, Networking

Watermarking, Chip ID, IP Protection

Application Acceleration #2

Acceleration of Video Applications

Poster Session 1

Poster Session 2

Poster Session 3

Poster Session 4

Poster Session 5

PhD Forum Presentations