Rajesh Gupta, Yukihiro Nakamura, Alex Orailoglu, Pai H. Chou (Eds.):
Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2003, Newport Beach, CA, USA, October 1-3, 2003.
ACM 2003, ISBN 1-58113-742-7
Architectural exploration and system simulations
Youngmin Yi, Dohyung Kim, Soonhoi Ha: Virtual synchronization technique with OS modeling for fast and time-accurate cosimulation.
1-6
Wei Ming Lim, Mohammed Benaissa: Design space exploration of a hardware-software co-designed GF(2m) galois field processor for forward error correction and cryptography.
53-58
Heiko Zimmer, Axel Jantsch: A fault model notation and error-control scheme for switch-to-switch buses in a network-on-chip.
188-193
James Lin: Design technology challenges for system and chip level designs in very deep submicron technologies.
194
Performance estimation in system design
Sungchan Kim, Chaeseok Im, Soonhoi Ha: Schedule-aware performance estimation of communication architecture for efficient design space exploration.
195-200