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Publication search results
found 99 matches
- 2015
- Stephan Werner, Leonard Masing, Fabian Lesniak, Jürgen Becker:
Software-in-the-Loop simulation of embedded control applications based on Virtual Platforms. FPL 2015: 1-8 - Mohamed S. Abdelfattah, Andrew Bitar, Ange Yaghi, Vaughn Betz:
Design and simulation tools for Embedded NOCs on FPGAs. FPL 2015: 1 - Siddharth Advani, Yasuki Tanabe, Kevin M. Irick, Jack Sampson, Vijaykrishnan Narayanan:
A scalable architecture for multi-class visual object detection. FPL 2015: 1-8 - Ali Ahari, Mojtaba Ebrahimi, Mehdi Baradaran Tahoori:
Energy efficient partitioning of dynamic reconfigurable MRAM-FPGAs. FPL 2015: 1-6 - Iman Ahmadpour, Behnam Khaleghi, Hossein Asadi:
An efficient reconfigurable architecture by characterizing most frequent logic functions. FPL 2015: 1-6 - Nikolaos Alachiotis:
Generating FPGA accelerators for chemical similarity assessment. FPL 2015: 1-4 - Alric Althoff, Ryan Kastner:
A scalable FPGA architecture for nonnegative least squares problems. FPL 2015: 1-8 - João Andrade, Nithin George, Kimon Karras, David Novo, Vítor Manuel Mendes da Silva, Paolo Ienne, Gabriel Falcão Paiva Fernandes:
From low-architectural expertise up to high-throughput non-binary LDPC decoders: Optimization guidelines using high-level synthesis. FPL 2015: 1-8 - Oluseyi A. Ayorinde, He Qi, Yu Huang, Benton H. Calhoun:
Using island-style bi-directional intra-CLB routing in low-power FPGAs. FPL 2015: 1-7 - Meena Belwal, Madhura Purnaprajna, T. S. B. Sudarshan:
Enabling seamless execution on hybrid CPU/FPGA systems: Challenges & directions. FPL 2015: 1-8 - Henry Block, Tsutomu Maruyama:
An FPGA implementation of a phylogenetic tree reconstruction algorithm using an alternative second-pass optimization. FPL 2015: 1-4 - Timm Bostelmann, Sergei Sawitzki:
Towards a guided design flow for heterogeneous reconfigurable architectures. FPL 2015: 1-2 - Pavel Burovskiy, Paul Grigoras, Spencer J. Sherwin, Wayne Luk:
Efficient assembly for high order unstructured FEM meshes. FPL 2015: 1-6 - Wolfgang Büter, Alberto García Ortiz, A. Ali, S. Mahmood, S. Arefin, V. V. Parsi Sreenivas, R. B. Bergman:
A rapid prototyping framework for nano-photonic accelerators. FPL 2015: 1-4 - Stefano Di Carlo, Paolo Prinetto, Pascal Trotta, Jan Andersson:
A portable open-source controller for safe Dynamic Partial Reconfiguration on Xilinx FPGAs. FPL 2015: 1-4 - Ioannis Chadjiminas, Christos Kyrkou, Theocharis Theocharides, Maria K. Michael, Christos Ttofis:
In-field vulnerability analysis of hardware-accelerated computer vision applications. FPL 2015: 1-4 - Qi Chen, Qiang Liu:
Pipelined NoC router architecture design with buffer configuration exploration on FPGA. FPL 2015: 1-4 - Ren Chen, Viktor K. Prasanna:
Automatic generation of high throughput energy efficient streaming architectures for arbitrary fixed permutations. FPL 2015: 1-8 - Peter Y. K. Cheung, Wayne Luk, Cristina Silvano:
Preface. FPL 2015: 1-2 - Thiem Van Chu, Shimpei Sato, Kenji Kise:
Ultra-fast NoC emulation on a single FPGA. FPL 2015: 1-8 - Alessandro Cilardo:
Variable-latency signed addition on FPGAs. FPL 2015: 1-6 - Rui Fiel Cordeiro, Arnaldo S. R. Oliveira, José M. N. Vieira:
FPGA-based all-digital transmitters. FPL 2015: 1-2 - Rui Fiel Cordeiro, Andre Prata, Arnaldo S. R. Oliveira, Nuno Borges Carvalho, José M. N. Vieira:
FPGA-based all-digital software defined radio system demonstration. FPL 2015: 1 - Nizar Dahir, Pedro B. Campos, Gianluca Tempesti, Martin Trefzer, Andrew M. Tyrrell:
Characterisation of feasibility regions in FPGAs under adaptive DVFS. FPL 2015: 1-4 - Dionysios Diamantopoulos, Sotirios Xydis, Kostas Siozios, Dimitrios Soudris:
High-Level-Synthesis extensions for scalable Single-Chip Many-Accelerators on FPGAs. FPL 2015: 1-2 - Chaohui Du, Guoqiang Bai:
Towards efficient discrete Gaussian sampling for lattice-based cryptography. FPL 2015: 1-6 - Rui Policarpo Duarte, Mário P. Véstias, Horácio C. Neto:
Enhancing stochastic computations via process variation. FPL 2015: 1-7 - Shane T. Fleming, Ivan Beretta, David B. Thomas, George A. Constantinides, Dan R. Ghica:
PushPush: Seamless integration of hardware and software objects via function calls over AXI. FPL 2015: 1-8 - Nicholas J. Fraser, Duncan J. M. Moss, JunKyu Lee, Stephen Tridgell, Craig T. Jin, Philip Heng Wai Leong:
A fully pipelined kernel normalised least mean squares processor for accelerated parameter optimisation. FPL 2015: 1-6 - Sebastian Friston, Anthony Steed, Simon Tilbury, Georgi Gaydadjiev:
Ultra low latency dataflow renderer. FPL 2015: 1-4
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