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Amit Mehrotra
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Journal Articles
- 2005
- [j3]Man Lung Mui, Kaustav Banerjee, Amit Mehrotra:
Supply and power optimization in leakage-dominant technologies. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(9): 1362-1371 (2005) - 2002
- [j2]Kaustav Banerjee, Amit Mehrotra:
Analysis of on-chip inductance effects for distributed RLC interconnects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(8): 904-915 (2002) - 1996
- [j1]James R. Whiteley, James F. Davis, Amit Mehrotra, Stanley C. Ahalt:
Observations and problems applying ART2 for dynamic sensor pattern interpretation. IEEE Trans. Syst. Man Cybern. Part A 26(4): 423-437 (1996)
Conference and Workshop Papers
- 2009
- [c28]Amit Mehrotra, Abhishek Somani:
A robust and efficient harmonic balance (HB) using direct solution of HB Jacobian. DAC 2009: 370-375 - 2007
- [c27]Igor Vytyaz, David C. Lee, Suihua Lu, Amit Mehrotra, Un-Ku Moon, Kartikeya Mayaram:
Parameter Finding Methods for Oscillators with a Specified Oscillation Frequency. DAC 2007: 424-429 - [c26]Igor Vytyaz, David C. Lee, Suihua Lu, Amit Mehrotra, Un-Ku Moon, Kartikeya Mayaram:
Periodic Steady-State Analysis of Oscillators with a Specified Oscillation Frequency. ISCAS 2007: 1073-1076 - 2005
- [c25]Amit Mehrotra, Suihua Lu, David C. Lee, Amit Narayan:
Steady-state analysis of voltage and current controlled oscillators. ICCAD 2005: 618-623 - 2004
- [c24]Makram M. Mansour, Mohammad M. Mansour, Amit Mehrotra:
Analysis of MOS cross-coupled LC-tank oscillators using short-channel device equations. ASP-DAC 2004: 181-185 - [c23]Anirban Basu, Sheng-Chih Lin, Vineet Wason, Amit Mehrotra, Kaustav Banerjee:
Simultaneous optimization of supply and threshold voltages for low-power and high-performance circuits in the leakage dominant era. DAC 2004: 884-887 - [c22]Makram M. Mansour, Amit Mehrotra, William W. Walker, Amit Narayan:
Analysis techniques for obtaining the steady-state solution of MOS LC oscillators. ISCAS (5) 2004: 512-515 - [c21]Suihua Lu, Amit Narayan, Amit Mehrotra:
Continuation method in multitone harmonic balance. ISCAS (5) 2004: 520-523 - [c20]Man Lung Mui, Kaustav Banerjee, Amit Mehrotra:
Power Supply Optimization in sub-130 nm Leakage Dominant Technologies . ISQED 2004: 409-414 - 2003
- [c19]Makram M. Mansour, Amit Mehrotra:
Model-Order Reduction Based on PRONY's Method. DATE 2003: 10530-10535 - [c18]Mohammad M. Mansour, Amit Mehrotra:
Efficient core designs based on parameterized macrocells with accurate delay models. ISCAS (5) 2003: 517-520 - [c17]Makram M. Mansour, Amit Mehrotra:
Reduced-Order Modeling Based on PRONY's and SHANK's Methods via the Bilinear Transformation. ISQED 2003: 299-304 - [c16]Makram M. Mansour, Mohammad M. Mansour, Amit Mehrotra:
Parameterized Macrocells with Accurate Delay Models for Core-Based Designs. ISQED 2003: 319-324 - [c15]Makram M. Mansour, Mohammad M. Mansour, Amit Mehrotra:
Modified Sakurai-Newton Current Model and its Applications to CMOS Digital Circuit Design. ISVLSI 2003: 62-69 - [c14]Makram M. Mansour, Amit Mehrotra:
Reduced-order Modelling using PRONY's Approximation Method. Modelling and Simulation 2003: 650-655 - 2002
- [c13]Kaustav Banerjee, Amit Mehrotra:
Inductance Aware Interconnect Scaling. ISQED 2002: 43-47 - 2001
- [c12]Kaustav Banerjee, Amit Mehrotra:
Analysis of On-Chip Inductance Effects using a Novel Performance Optimization Methodology for Distributed RLC Interconnects. DAC 2001: 798-803 - [c11]Kaustav Banerjee, Amit Mehrotra:
Coupled Analysis of Electromigration Reliability and Performance in ULSI Signal Nets. ICCAD 2001: 158-164 - [c10]Amit Mehrotra:
Noise in Radio Frequency Circuits: Analysis and Design Implications. ISQED 2001: 469-476 - 2000
- [c9]Shukri J. Souri, Kaustav Banerjee, Amit Mehrotra, Krishna Saraswat:
Multiple Si layer ICs: motivation, performance analysis, and design implications. DAC 2000: 213-220 - [c8]Amit Mehrotra:
Noise Analysis of Phase-Locked Loops. ICCAD 2000: 277-282 - 1999
- [c7]Sunil P. Khatri, Amit Mehrotra, Robert K. Brayton, Ralph H. J. M. Otten, Alberto L. Sangiovanni-Vincentelli:
A Novel VLSI Layout Fabric for Deep Sub-Micron Applications. DAC 1999: 491-496 - [c6]Kaustav Banerjee, Amit Mehrotra, Alberto L. Sangiovanni-Vincentelli, Chenming Hu:
On Thermal Effects in Deep Sub-Micron VLSI Interconnects. DAC 1999: 885-891 - [c5]Amit Mehrotra, Alberto L. Sangiovanni-Vincentelli:
Noise analysis of non-autonomous radio frequency circuits. ICCAD 1999: 55-60 - 1998
- [c4]Alper Demir, Amit Mehrotra, Jaijeet Roychowdhury:
Phase noise and timing jitter in oscillators. CICC 1998: 45-48 - [c3]Alper Demir, Amit Mehrotra, Jaijeet S. Roychowdhury:
Phase Noise in Oscillators: A Unifying Theory and Numerical Methods for Characterisation. DAC 1998: 26-31 - 1997
- [c2]Amit Mehrotra, Shaz Qadeer, Vigyan Singhal, Robert K. Brayton, Adnan Aziz, Alberto L. Sangiovanni-Vincentelli:
Sequential optimisation without state space exploration. ICCAD 1997: 208-215 - [c1]Amit Mehrotra, Shaz Qadeer, Rajeev K. Ranjan, Randy H. Katz:
Benchmarking and Analysis of Architectures for CAD Applications. ICCD 1997: 670-675
Coauthor Index
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