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ORCIDJohn Sartori
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Books and Theses
- 2012
[b1]John Sartori:
Programmable stochastic processors. University of Illinois Urbana-Champaign, USA, 2012
Journal Articles
- 2021
- [j13]Greg M. Silverman, Himanshu S. Sahoo, Nicholas Ingraham, Monica Lupei, Michael A. Puskarich, Michael Usher, James Dries, Raymond L. Finzel, Eric Murray, John Sartori, György J. Simon, Rui Zhang, Genevieve B. Melton
, Christopher J. Tignanelli, Serguei V. S. Pakhomov:
NLP Methods for Extraction of Symptoms from Unstructured Data for Use in Prognostic COVID-19 Analytic Models. J. Artif. Intell. Res. 72: 429-474 (2021) - 2018
- [j12]Filipe Betzel, S. Karen Khatamifard, Harini Suresh, David J. Lilja, John Sartori, Ulya R. Karpuzcu:
Approximate Communication: Techniques for Reducing Communication Bottlenecks in Large-Scale Parallel Systems. ACM Comput. Surv. 51(1): 1:1-1:32 (2018) - [j11]Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori:
Bespoke Processors for Applications with Ultra-Low Area and Power Constraints. IEEE Micro 38(3): 32-39 (2018) - 2017
- [j10]David Brooks, John Sartori:
Ultra-Low-Power Processors. IEEE Micro 37(6): 16-19 (2017) - [j9]Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori:
Determining Application-Specific Peak Power and Energy Requirements for Ultra-Low-Power Processors. ACM Trans. Comput. Syst. 35(3): 9:1-9:33 (2017) - 2016
- [j8]Amoghavarsha Suresh, John Sartori:
Automated Algorithmic Error Resilience Based on Outlier Detection. IEEE Micro 36(1): 46-59 (2016) - 2013
- [j7]Xun Jian, John Sartori, Henry Duwe, Rakesh Kumar:
High Performance, Energy Efficient Chipkill Correct Memory with Multidimensional Parity. IEEE Comput. Archit. Lett. 12(2): 39-42 (2013) - [j6]John Sartori, Rakesh Kumar:
Exploiting Timing Error Resilience in Processor Architecture. ACM Trans. Embed. Comput. Syst. 12(2s): 89:1-89:25 (2013) - [j5]John Sartori, Rakesh Kumar:
Branch and Data Herding: Reducing Control and Memory Divergence for Error-Tolerant GPU Applications. IEEE Trans. Multim. 15(2): 279-290 (2013) - [j4]Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, John Sartori:
Enhancing the Efficiency of Energy-Constrained DVFS Designs. IEEE Trans. Very Large Scale Integr. Syst. 21(10): 1769-1782 (2013) - 2012
- [j3]Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, John Sartori:
Recovery-Driven Design: Exploiting Error Resilience in Design of Energy-Efficient Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(3): 404-417 (2012) - 2011
- [j2]John Sartori, Rakesh Kumar:
Stochastic Computing. Found. Trends Electron. Des. Autom. 5(3): 153-210 (2011) - 2008
- [j1]Nicolas Zea, John Sartori, Rakesh Kumar:
Servo: a programming model for many-core computing. SIGARCH Comput. Archit. News 36(2): 28-37 (2008)
Conference and Workshop Papers
- 2022
- [c39]Subhash Sethumurugan, Shashank Hegde, Hari Cherupalli, John Sartori:
A scalable symbolic simulation tool for low power embedded systems. DAC 2022: 175-180 - [c38]Himanshu S. Sahoo, Nicholas Ingraham, Greg M. Silverman, John Sartori:
Towards Fairness and Interpretability: Clinical Decision Support for Acute Coronary Syndrome. ICMLA 2022: 882-886 - [c37]Olaitan Adeleke, Heidi Woelfle, John Sartori, Lucy E. Dunne:
Solar Textiles for Off-grid Populations in Sub-Saharan Africa. ISWC 2022: 115-119 - 2021
- [c36]Shashank Hegde, Subhash Sethumurugan, Hari Cherupalli, Henry Duwe, John Sartori:
Constrained Conservative State Symbolic Co-analysis for Ultra-low-power Embedded Systems. ASP-DAC 2021: 318-324 - [c35]Nathaniel Bleier, John Sartori, Rakesh Kumar:
Property-driven Automatic Generation of Reduced-ISA Hardware. DAC 2021: 349-354 - [c34]Subhash Sethumurugan, Jieming Yin, John Sartori:
Designing a Cost-Effective Cache Replacement Policy using Machine Learning. HPCA 2021: 291-303 - 2019
- [c33]Xinwei Zhang, John Sartori, Mingyi Hong, Sairaj V. Dhople:
DImplementing First-order Optimization Methods: Algorithmic Considerations and Bespoke Microcontrollers. ACSSC 2019: 296-300 - 2018
- [c32]Veni Mohan, Akhilesh Iyer, John Sartori:
Enhancing workload-dependent voltage scaling for energy-efficient ultra-low-power embedded systems. DAC 2018: 42:1-42:6 - 2017
- [c31]Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori:
Determining Application-specific Peak Power and Energy Requirements for Ultra-low Power Processors. ASPLOS 2017: 3-16 - [c30]Harini Suresh, Shashank Hegde, John Sartori:
Approximate compression: enhancing compressibility through data approximation. ESTIMedia 2017: 41-50 - [c29]Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori:
Enabling Effective Module-Oblivious Power Gating for Embedded Processors. HPCA 2017: 157-168 - [c28]Hari Cherupalli, John Sartori:
Scalable N-worst algorithms for dynamic timing and activity analysis. ICCAD 2017: 585-592 - [c27]Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori:
Bespoke Processors for Applications with Ultra-low Area and Power Constraints. ISCA 2017: 41-54 - [c26]Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori:
Software-based gate-level information flow security for IoT systems. MICRO 2017: 328-340 - 2016
- [c25]Amrut Kapare, Hari Cherupalli, John Sartori:
Automated error prediction for approximate sequential circuits. ICCAD 2016: 82 - [c24]Hari Cherupalli, Rakesh Kumar, John Sartori:
Exploiting Dynamic Timing Slack for Energy Efficiency in Ultra-Low-Power Embedded Systems. ISCA 2016: 671-681 - 2015
- [c23]Hari Cherupalli, John Sartori:
Graph-based Dynamic Analysis: Efficient Characterization of Dynamic Timing and Activity Distributions. ICCAD 2015: 729-735 - [c22]M. Hassan Najafi, Anirudh Murali, David J. Lilja, John Sartori:
GPU-Accelerated Nick Local Image Thresholding Algorithm. ICPADS 2015: 576-584 - 2014
- [c21]Amoghavarsha Suresh, John Sartori:
Automated Algorithmic Error Resilience for Structured Grid Problems Based on Outlier Detection. CGO 2014: 240 - [c20]John Sartori, Rakesh Kumar:
Software canaries: software-based path delay fault testing for variation-aware energy-efficient design. ISLPED 2014: 159-164 - 2013
- [c19]Wei-Ting Jonas Chan, Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, John Sartori:
Statistical analysis and modeling for error composition in approximate computation circuits. ICCD 2013: 47-53 - [c18]Xun Jian, Henry Duwe, John Sartori, Vilas Sridharan, Rakesh Kumar:
Low-power, low-storage-overhead chipkill correct via multi-line error correction. SC 2013: 24:1-24:12 - 2012
- [c17]John Sartori, Rakesh Kumar:
Branch and data herding: reducing control and memory divergence for error-tolerant GPU applications. PACT 2012: 427-428 - [c16]Joseph Sloan, John Sartori, Rakesh Kumar:
On software design for stochastic processors. DAC 2012: 918-923 - [c15]John Sartori, Rakesh Kumar:
Compiling for energy efficiency on timing speculative processors. DAC 2012: 1301-1308 - [c14]John Sartori, Ben Ahrens, Rakesh Kumar:
Power balanced pipelines. HPCA 2012: 261-272 - 2011
- [c13]John Sartori, Rakesh Kumar:
Architecting processors to allow voltage/reliability tradeoffs. CASES 2011: 115-124 - [c12]John Sartori, Joseph Sloan, Rakesh Kumar:
Stochastic computing: embracing errors in architectureand design of processors and applications. CASES 2011: 135-144 - [c11]Tuck-Boon Chan, John Sartori, Puneet Gupta, Rakesh Kumar:
On the efficacy of NBTI mitigation techniques. DATE 2011: 932-937 - 2010
- [c10]Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, John Sartori:
Slack redistribution for graceful degradation under voltage overscaling. ASP-DAC 2010: 825-831 - [c9]Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, John Sartori:
Recovery-driven design: a power minimization methodology for error-tolerant processor modules. DAC 2010: 825-830 - [c8]Sriram Narayanan, John Sartori, Rakesh Kumar, Douglas L. Jones:
Scalable stochastic processors. DATE 2010: 335-338 - [c7]John Sartori, Rakesh Kumar:
Overscaling-friendly timing speculation architectures. ACM Great Lakes Symposium on VLSI 2010: 209-214 - [c6]John Sartori, Rakesh Kumar:
Low-Overhead, High-Speed Multi-core Barrier Synchronization. HiPEAC 2010: 18-34 - [c5]Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, John Sartori:
Designing a processor from the ground up to allow voltage/reliability tradeoffs. HPCA 2010: 1-11 - [c4]Nicolas Zea, John Sartori, Ben Ahrens, Rakesh Kumar:
Optimal power/performance pipelining for error resilient processors. ICCD 2010: 356-363 - [c3]John Sartori, Aashish Pant, Rakesh Kumar, Puneet Gupta:
Variation-aware speed binning of multi-core processors. ISQED 2010: 307-314 - 2009
- [c2]John Sartori, Rakesh Kumar:
Distributed peak power management for many-core architectures. DATE 2009: 1556-1559 - [c1]John Sartori, Rakesh Kumar:
Three scalable approaches to improving many-core throughput for a given peak power budget. HiPC 2009: 89-98
Coauthor Index
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