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Journal Articles

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2012
[j4]
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Hoi-Jin Lee, Jong-Woo Kim, Tae Hee Han, Jae-Cheol Son, Jeong-Taek Kong, Bai-Sun Kong:
Low-power dual-supply clock networks with clock gating and frequency doubling. IEICE Electron. Express 9(6): 502-508 (2012)
2007
[j3]
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Andrew B. Kahng, Ira Chayut, John M. Cohn, Toshihiro Hattori, Jeong-Taek Kong, Pierre G. Paulin, Rich Tobias:
Roundtable: Design and CAD Challenges for Leading-Edge Multimedia Designs. IEEE Des. Test Comput. 24(1): 83-93 (2007)
2004
[j2]
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Jeong-Taek Kong:
CAD for nanometer silicon design challenges and success. IEEE Trans. Very Large Scale Integr. Syst. 12(11): 1132-1147 (2004)
1995
[j1]
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Jeong-Taek Kong, David Overhauser:
Methods to improve digital MOS macromodel accuracy. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(7): 868-881 (1995)

Conference and Workshop Papers

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2007
[c28]
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Jeong-Taek Kong:
Tipping Point for New Design Technologies: DFM, Low Power and ESL. ISQED 2007: 9-14
[c27]
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Jeong-Yeol Kim, Ho-Soon Shin, Jong-Bae Lee, Moon-Hyun Yoo, Jeong-Taek Kong:
SilcVerify: An Efficient Substrate Coupling Noise Simulation Tool for High-Speed & Nano-Scaled Memory Design. ISQED 2007: 475-480
2006
[c26]
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Ikhwan Lee, Hyunsuk Kim, Peng Yang, Sungjoo Yoo, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo:
PowerViP: Soc power estimation framework at transaction level. ASP-DAC 2006: 551-558
[c25]
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  - conf/codes/HongYLLNYHSKKJCKE06
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Sungpack Hong, Sungjoo Yoo, Sheayun Lee, Sangwoo Lee, Hye Jeong Nam, Bum-Seok Yoo, Jaehyung Hwang, Donghyun Song, Janghwan Kim, Jeongeun Kim, HoonSang Jin, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo:
Creation and utilization of a virtual platform for embedded software optimization: : an industrial case study. CODES+ISSS 2006: 235-240
[c24]
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John M. Cohn, Jeong-Taek Kong, Chris Malachowsky, Rich Tobias, Brendan Traw:
Design challenges for next-generation multimedia, game and entertainment platforms. DAC 2006: 459
[c23]
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Junhyung Um, Woo-Cheol Kwon, Sungpack Hong, Young-Taek Kim, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo, Taewhan Kim:
A systematic IP and bus subsystem modeling for platform-based system design. DATE 2006: 560-564
[c22]
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Sungpack Hong, Sungjoo Yoo, HoonSang Jin, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo:
Runtime distribution-aware dynamic voltage scaling. ICCAD 2006: 587-594
[c21]
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Young-Gu Kim, Sang-Hoon Lee, Dae-Han Kim, Jae-Woo Im, Sung-Eun Yu, Dae-Wook Kim, Young-Kwan Park, Jeong-Taek Kong:
Sensing Margin Analysis of MLC Flash Memories Using a Novel Unified Statistical Model. ISQED 2006: 185-189
2005
[c20]
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Jeong-Taek Kong:
SoC in Nanoera: Challenges and Endless Possibility. DATE 2005: 2
[c19]
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Young-Taek Kim, Taehun Kim, Youngduk Kim, Chulho Shin, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo:
Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture. DATE 2005: 138-139
[c18]
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Yong-Chan Ban, Soo-Han Choi, Ki-Hung Lee, Dong-Hyun Kim, Jisuk Hong, Yoo-Hyon Kim, Moon-Hyun Yoo, Jeong-Taek Kong:
A Fast Lithography Verification Framework for Litho-Friendly Layout Design. ISQED 2005: 169-174
[c17]
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Young-Seok Hong, Heeseok Lee, Joon-Ho Choi, Moon-Hyun Yoo, Jeong-Taek Kong:
Analysis for Complex Power Distribution Networks Considering Densely Populated Vias. ISQED 2005: 208-212
2004
[c16]
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Chulho Shin, Young-Taek Kim, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo:
Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design. DATE 2004: 352-357
[c15]
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Jong-Eun Koo, Kyung-Ho Lee, Young-Hoe Cheon, Joon-Ho Choi, Moon-Hyun Yoo, Jeong-Taek Kong:
A Variable Reduction Technique for the Analysis of Ultra Large-Scale Power Distribution Networks. ISQED 2004: 137-142
2003
[c14]
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Hyo-Sig Won, Kyo-Sun Kim, Kwang-Ok Jeong, Ki-Tae Park, Kyu-Myung Choi, Jeong-Taek Kong:
An MTCMOS design methodology and its application to mobile computing. ISLPED 2003: 110-115
[c13]
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Jae-Seok Yang, Jeong-Yeol Kim, Joon-Ho Choi, Moon-Hyun Yoo, Jeong-Taek Kong:
Elimination of false aggressors using the functional relationship for full-chip crosstalk analysis. ISQED 2003: 344-347
[c12]
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Won-Seok Lee, Keun-Ho Lee, Jin-Kyu Park, Tae-Kyung Kim, Young-Kwan Park, Jeong-Taek Kong:
Investigation of the capacitance deviation due to metal-fills and the effective interconnect geometry modeling. ISQED 2003: 373-376
2002
[c11]
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Chul-Hong Park, Soo-Han Choi, Sang-Uhk Rhie, Dong-Hyun Kim, Jun-Seong Park, Tae-Hwang Jang, Ji-Soong Park, Yoo-Hyon Kim, Moon-Hyun Yoo, Jeong-Taek Kong:
A Hybrid PPC Method Based on the Empirical Etch Model for the 0.14µm DRAM Generation and Beyond. ISQED 2002: 143-147
[c10]
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Jin-Kyu Park, Keun-Ho Lee, Chang-Sub Lee, Gi-Young Yang, Young-Kwan Park, Jeong-Taek Kong:
Characterizing the Current Degradation of Abnormally Structured MOS Transistors Using a 3D Poisson Solver. ISQED 2002: 322-325
2001
[c9]
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Tae-Jin Kwon, Sang-Hoon Lee, Tae-Seon Kim, Hoe-Jin Lee, Young-Kwan Park, Taek-Soo Kim, Seok-Jin Kim, Jeong-Taek Kong:
Performance Improvement for High Speed Devices Using E-tests and the SPICE Model. ISQED 2001: 443-447
2000
[c8]
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  - conf/cicc/YangKKK00
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Gi-Young Yang, Yeong-Gil Kim, Taek-Soo Kim, Jeong-Taek Kong:
S-TFT: an analytical model of polysilicon thin-film transistors for circuit simulation. CICC 2000: 213-216
[c7]
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Ji-Soong Park, Chul-Hong Park, Sang-Uhk Rhie, Yoo-Hyon Kim, Moon-Hyun Yoo, Jeong-Taek Kong, Hyung-Woo Kim, Sun-Il Yoo:
An Efficient Rule-Based OPC Approach Using a DRC Tool for 0.18mum ASIC. ISQED 2000: 81-86
[c6]
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Kwan-Do Kim, Young-Kwan Park, Jun-Ha Lee, Jeong-Taek Kong, Hee-Sung Kang, Young-Wug Kim, Seok-Jin Kim:
Three Dimensional Analysis of Thermal Degradation Effects in FDSOI MOSFET's. ISQED 2000: 87-
1999
[c5]
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  - conf/islped/JinJSLKK99
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HoonSang Jin, Myung-Soo Jang, Jin-Suk Song, Jin-Yong Lee, Taek-Soo Kim, Jeong-Taek Kong:
Dynamic power estimation using the probabilistic contribution measure (PCM). ISLPED 1999: 279-281
1997
[c4]
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  - conf/iccad/LeeCKLY97
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Sang-Hoon Lee, Chang-hoon Choi, Jeong-Taek Kong, Wong-Seong Lee, Jei-Hwan Yoo:
An efficient statistical analysis methodology and its application to high-density DRAMs. ICCAD 1997: 678-683
1995
[c3]
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Jeong-Taek Kong, David Overhauser:
Combining RC-Interconnect Effects with Nonlinear MOS Macromodels. ISCAS 1995: 570-573
[c2]
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Jeong-Taek Kong, Syed Zakir Hussain, David Overhauser:
Improving Digital MOS Macromodel Accuracy. ISCAS 1995: 578-581
1989
[c1]
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Dae-Hyung Cho, Tae-Han Kim, Jeong-Taek Kong:
A table look-up model using a 3-D isoparametric shape function with improved convergency. ICCAD 1989: 244-247

Informal and Other Publications

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2007
[i1]
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Young-Taek Kim, Taehun Kim, Youngduk Kim, Chulho Shin, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo:
Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture. CoRR abs/0710.4808 (2007)

Coauthor Index

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