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Ricardo S. Ferreira 0001
Person information
- affiliation: Federal University of Viçosa, Minas Gerais, Brazil
Other persons with the same name
- Ricardo Ferreira — disambiguation page
- Ricardo Ferreira 0002 — Instituto Superior Técnico, Institute for Systems and Robotics, Lisbon, Portugal
- Ricardo Ferreira 0003
— International Iberian Nanotechnology Laboratory, Braga, Portugal
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2020 – today
- 2024
- [j18]Leonardo Fagundes-Junior
, Kevin Braathen de Carvalho
, Ricardo S. Ferreira
, Alexandre Santos Brandão
:
Machine Learning for Unmanned Aerial Vehicles Navigation: An Overview. SN Comput. Sci. 5(2): 256 (2024) - 2023
- [j17]Lucas Bragança
, Michael Canesche
, Jeronimo Costa Penha
, Josué Campos, José Augusto Miranda Nacif
, Ricardo S. Ferreira:
Fast flow cloud: A stream dataflow framework for cloud FPGA accelerator overlays at runtime. Concurr. Comput. Pract. Exp. 35(17) (2023) - [j16]Westerley Carvalho
, Michael Canesche
, Lucas Reis, José Augusto Miranda Nacif
, Ricardo S. Ferreira
:
Heterogeneous reconfigurable architectures for machine learning dataflows. Concurr. Comput. Pract. Exp. 35(17) (2023) - [j15]Leonardo Fagundes-Junior
, Michael Canesche
, Ricardo S. Ferreira
, Alexandre Santos Brandão
:
High-performance graphics processing unit-based strategy for tuning a unmanned aerial vehicle controller subject to time-delay constraints. Concurr. Comput. Pract. Exp. 35(24) (2023) - [j14]Jeronimo Costa Penha
, Lucas Bragança, Michael Canesche
, Dener Ribeiro, José Augusto Miranda Nacif
, Ricardo S. Ferreira:
Gene regulatory accelerators on cloud FPGA. Concurr. Comput. Pract. Exp. 35(24) (2023) - [c52]Ruan Evangelista Formigoni, Ricardo S. Ferreira, Omar P. Vilela Neto, José Augusto Miranda Nacif:
L-BANCS: A Multi-Phase Tile Design for Nanomagnetic Logic. ISVLSI 2023: 1-6 - [c51]Stefan T. Couperus Leal, Michael Canesche, Omar P. Vilela Neto, Ricardo S. Ferreira, José A. M. Nacif:
A Non-Blocking Multistage Interconnection using Regular Clock Schemes for QCA Circuits. SBCCI 2023: 1-6 - [c50]Pedro Arthur R. L. Silva, Jeferson F. Chaves, José Augusto Miranda Nacif, Ricardo S. Ferreira, Omar Paranaiba Vilela Neto:
Exploring Nanomagnetic Logic with Bennett Clocking. SBCCI 2023: 1-6 - [c49]Olavo A. B. Silva, Alysson K. C. Silva, Ícaro G. S. Moreira, José A. M. Nacif, Ricardo S. Ferreira:
RDSF: Everything at Same Place All at Once - A Random Decision Single Forest. SBESC 2023: 1-6 - 2022
- [j13]Maria D. Vieira
, Samuel S. H. Ng
, Marcel Walter
, Robert Wille
, Konrad Walus
, Ricardo S. Ferreira
, Omar P. Vilela Neto
, José Augusto Miranda Nacif
:
Three-Input NPN Class Gate Library for Atomic Silicon Quantum Dots. IEEE Des. Test 39(6): 147-155 (2022) - [c48]Michael Canesche, Ricardo S. Ferreira, José Augusto Miranda Nacif, Fernando Magno Quintão Pereira
:
A polynomial time exact solution to the bit-aware register binding problem. CC 2022: 29-40 - [c47]Laysson Oliveira Luz, José Augusto Miranda Nacif, Ricardo S. Ferreira, Omar P. Vilela Neto:
An NML in-plane Wire Crossing Structure. LASCAS 2022: 1-4 - 2021
- [j12]Michael Canesche
, Marcelo M. Menezes
, Westerley Carvalho
, Frank Sill Torres
, Peter Jamieson
, José Augusto Miranda Nacif
, Ricardo S. Ferreira
:
TRAVERSAL: A Fast and Adaptive Graph-Based Placement and Routing for CGRAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(8): 1600-1612 (2021) - [j11]Danilo Damião Almeida, Lucas Bragança
, Frank Sill Torres
, Ricardo Ferreira
, José Augusto Miranda Nacif
:
HAMBug: A Hybrid CPU-FPGA System to Detect Race Conditions. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3158-3162 (2021) - [j10]Michael Canesche, Westerley Carvalho, Lucas Reis, Matheus Aguilar de Oliveira, Salles V. G. Magalhães, Peter Jamieson, José Augusto Miranda Nacif, Ricardo Ferreira:
You Only Traverse Twice: A YOTT Placement, Routing, and Timing Approach for CGRAs. ACM Trans. Embed. Comput. Syst. 20(5s): 52:1-52:25 (2021) - [c46]Peter Jamieson, Santhiya Sampath Kumar, José Augusto Miranda Nacif, Ricardo S. Ferreira:
Analyzing a Low-bit rate Audio Codec - Codec2 - on an FPGA. CSCI 2021: 1486-1492 - [c45]Peter Jamieson, Ricardo S. Ferreira, José Augusto Miranda Nacif:
Personalizing Online Computer Engineering Resources and Labs for Digital, Embedded, and Computer System Courses. FIE 2021: 1-5 - [c44]Michael Canesche, Lucas Bragança
, Omar Paranaiba Vilela Neto
, José Augusto Miranda Nacif, Ricardo S. Ferreira:
Google Colab CAD4U: Hands-On Cloud Laboratories for Digital Design. ISCAS 2021: 1-5 - [c43]Laysson Oliveira Luz, José Augusto Miranda Nacif, Ricardo S. Ferreira, Omar P. Vilela Neto
:
NMLib: A Nanomagnetic Logic Standard Cell Library. ISCAS 2021: 1-5 - [c42]Isaac Nelson, Ricardo S. Ferreira, José Augusto Miranda Nacif, Peter Jamieson:
Is It Time to Include High-Level Synthesis Design in Digital System Education for Undergraduate Computer Engineers? ISCAS 2021: 1-5 - [c41]Maria D. Vieira, Michael Canesche, Lucas Bragança
, Josué Campos, Mateus Silva, Ricardo S. Ferreira, José Augusto Miranda Nacif:
RESHAPE: A Run-Time Dataflow Hardware-Based Mapping for CGRA Overlays. ISCAS 2021: 1-5 - [c40]Lucas Bragança
, Michael Canesche, Jeronimo Costa Penha, Westerley Carvalho, Giovanni Comarela, José Augusto Miranda Nacif, Ricardo S. Ferreira:
An Open Source Custom K-means Generator for AWS Cloud FPGA Accelerators. SBESC 2021: 1-8 - 2020
- [j9]Frank Sill Torres, Pedro Arthur Silva, Geraldo Fontes, Marcel Walter
, José Augusto Miranda Nacif, Ricardo Santos Ferreira, Omar Paranaiba Vilela Neto
, Jeferson F. Chaves
, Robert Wille, Philipp Niemann, Daniel Große, Rolf Drechsler
:
On the impact of the synchronization constraint and interconnections in quantum-dot cellular automata. Microprocess. Microsystems 76: 103109 (2020) - [c39]Peter Jamieson, Ricardo S. Ferreira, José Augusto Miranda Nacif:
GA-lapagos, an open-source c framework including a python-based system for data analysis. GECCO Companion 2020: 1589-1590 - [c38]Westerley Carvalho, Michael Canesche, Lucas Reis, Frank Sill Torres, Lucas B. da Silva, Peter Jamieson, José Augusto Miranda Nacif, Ricardo S. Ferreira:
A Design Exploration of Scalable Mesh-based Fully Pipelined Accelerators. FPT 2020: 233-236 - [c37]Fernando Passe, Michael Canesche, Omar Paranaiba Vilela Neto, José Augusto Miranda Nacif, Ricardo S. Ferreira:
Mind the Gap: Bridging Verilog and Computer Architecture. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j8]Jeronimo Costa Penha
, Lucas B. da Silva, Jansen Silva, Kristtopher Coelho, Hector P. Baranda, José Augusto Miranda Nacif, Ricardo Ferreira:
ADD: Accelerator Design and Deploy - A tool for FPGA high-performance dataflow computing. Concurr. Comput. Pract. Exp. 31(18) (2019) - [j7]Lucas Bragança da Silva, Ricardo S. Ferreira, Michael Canesche, Marcelo M. Menezes, Maria D. Vieira, Jeronimo Costa Penha
, Peter Jamieson, José Augusto Miranda Nacif:
READY: A Fine-Grained Multithreading Overlay Framework for Modern CPU-FPGA Dataflow Applications. ACM Trans. Embed. Comput. Syst. 18(5s): 56:1-56:20 (2019) - [j6]Ricardo S. Ferreira
, Cristoferson Bueno
, Marcone Laure
, Monica Magalhães Pereira, Luigi Carro
:
A Dynamic Reconfigurable Super-VLIW Architecture for a Fault Tolerant Nanoscale Design. Trans. High Perform. Embed. Archit. Compil. 5: 121-139 (2019) - [c36]Ruan Evangelista Formigoni, Ricardo S. Ferreira, José Augusto Miranda Nacif:
Ropper: a placement and routing framework for field-coupled nanotechnologies. SBCCI 2019: 24 - [c35]Pedro de Almeida Sacramento, Ricardo dos Santos Ferreira, Marcus Vinícius Alvim Andrade:
Bezalel - Towards low-cost pin-based shape displays. SIGGRAPH Asia Technical Briefs 2019: 106-109 - 2018
- [c34]Frank Sill Torres
, Pedro Arthur Silva, Geraldo Fontes, José Augusto Miranda Nacif, Ricardo Santos Ferreira, Omar Paranaiba Vilela Neto
, Jeferson F. Chaves
, Rolf Drechsler
:
Exploration of the Synchronization Constraint in Quantum-dot Cellular Automata. DSD 2018: 642-648 - [c33]Salles Viana Gomes Magalhães, W. Randolph Franklin, Ricardo dos Santos Ferreira:
Fast analysis of upstream features on spatial networks (GIS cup). SIGSPATIAL/GIS 2018: 622-625 - [c32]Geraldo Fontes, Pedro Arthur R. L. Silva, José Augusto Miranda Nacif, Omar P. Vilela Neto
, Ricardo Ferreira:
Placement and Routing by Overlapping and Merging QCA Gates. ISCAS 2018: 1-5 - [c31]Pedro Arthur R. L. Silva, Juliana Rezende S. B. Alves, Ricardo S. Ferreira, Omar P. Vilela Neto
, José Augusto Miranda Nacif:
A Novel Five-input Multiple-function QCA Threshold Gate. ISCAS 2018: 1-5 - [c30]Lucas Bragança
, Fredy A. M. Alves, Jeronimo Costa Penha
, Gabriel T. P. Coimbra, Ricardo Ferreira, José Augusto Miranda Nacif:
Simplifying HW/SW integration to deploy multiple accelerators for CPU-FPGA heterogeneous platforms. SAMOS 2018: 97-104 - [c29]Fredy A. M. Alves, Peter Jamieson, Lucas Bragança
, Ricardo Ferreira, José Augusto Miranda Nacif:
Lessons learned on which applications benefit when implemented on CPU-FPGA heterogeneous system. SAMOS 2018: 150-156 - [c28]Pedro Caldeira, Jeronimo Costa Penha
, Lucas Bragança
, Ricardo Ferreira, José Augusto Miranda Nacif, Renato Ferreira, Fernando Magno Quintão Pereira:
From Java to FPGA: An Experience with the Intel HARP System. SBAC-PAD 2018: 17-24 - [c27]Ricardo Ferreira, Michael Canesche, Kristtopher Coelho, José Augusto Miranda Nacif:
Minimum Switching Networks. SBESC 2018: 225-230 - [c26]Jeronimo Costa Penha
, Lucas Bragança
, Kristtopher Coelho, Michael Canesche, Jansen Silva, Giovanni Comarela, José Augusto Miranda Nacif, Ricardo Ferreira:
A GPU/FPGA-Based K-Means Clustering Using a Parameterized Code Generator. WSCAD 2018: 61-69 - 2017
- [c25]Fredy Augusto M. Alves, Peter Jamieson, Lucas B. da Silva, Ricardo S. Ferreira, José Augusto Miranda Nacif:
Designing a collision detection accelerator on a heterogeneous CPU-FPGA platform. ReConFig 2017: 1-6 - [c24]Lucas B. da Silva, Danilo Damião Almeida, José Augusto Miranda Nacif, Ismael Sanchez-Osorio, Carlos A. Hernandez-Martinez, Ricardo Ferreira:
Exploring the dynamics of large-scale gene regulatory networks using hardware acceleration on a heterogeneous CPU-FPGA platform. ReConFig 2017: 1-7 - 2016
- [j5]Marco Aurélio Wehrmeister
, Ricardo Santos Ferreira:
SBESC 2014 guest editors' introduction. Des. Autom. Embed. Syst. 20(2): 93-94 (2016) - [j4]Ricardo S. Ferreira, Waldir Denver, Monica Magalhães Pereira, Stephan Wong, Carlos Arthur Lang Lisbôa, Luigi Carro:
A Dynamic Modulo Scheduling with Binary Translation: Loop optimization with software compatibility. J. Signal Process. Syst. 85(1): 45-66 (2016) - [c23]Alyson Trindade, Ricardo S. Ferreira, José Augusto Miranda Nacif, Douglas Sales, Omar P. Vilela Neto
:
A Placement and routing algorithm for Quantum-dot Cellular Automata. SBCCI 2016: 1-6 - 2015
- [j3]Lisane B. de Brisolara
, Ricardo Santos Ferreira:
SBESC 2013 guest editor's introduction. Des. Autom. Embed. Syst. 19(4): 327-328 (2015) - [j2]Ricardo S. Ferreira, Luciana Rocha, André G. Santos, José Augusto Miranda Nacif, Stephan Wong, Luigi Carro:
A Runtime FPGA Placement and Routing Using Low-Complexity Graph Traversal. ACM Trans. Reconfigurable Technol. Syst. 8(2): 9:1-9:16 (2015) - [c22]Fábio Rodrigues Martins, Alcione de Paiva Oliveira, Ricardo dos Santos Ferreira, Fabio Ribeiro Cerqueira:
Hardware Architecture Benchmarking for Simulation of Human Immune System by Multi-agent Systems. EUMAS/AT 2015: 441-448 - [c21]Ricardo S. Ferreira, José Augusto Miranda Nacif, Salles V. G. Magalhães, Thales T. de Almeida, Racyus D. G. Pacífico:
Be a simulator developer and go beyond in computing engineering. FIE 2015: 1-8 - [c20]Adriano Donato Couto, Fabio Ribeiro Cerqueira, Ricardo dos Santos Ferreira, Alcione de Paiva Oliveira:
Proposal of a New Method for de Novo DNA Sequence Assembly Using de Bruijn Graphs. ISCIS 2015: 307-317 - [c19]André B. M. Gomes, Fredy A. M. Alves, Ricardo S. Ferreira, José Augusto Miranda Nacif:
Vericonn: a tool to generate efficient interconnection networks for post-silicon debug. LATS 2015: 1-6 - [c18]André B. M. Gomes, Fredy A. M. Alves, Ricardo S. Ferreira, José Augusto Miranda Nacif:
Increasing Observability in Post-Silicon Debug Using Asymmetric Omega Networks. SBCCI 2015: 17:1-17:7 - 2014
- [c17]Ricardo S. Ferreira, Waldir Denver, Monica Magalhães Pereira, Jorge Quadros, Luigi Carro, Stephan Wong:
A run-time modulo scheduling by using a binary translation mechanism. ICSAMOS 2014: 75-82 - 2013
- [c16]Ricardo S. Ferreira, Luciana Rocha, André G. Santos, José Augusto Miranda Nacif, Stephan Wong, Luigi Carro:
A run-time graph-based Polynomial Placement and routing algorithm for virtual FPGAS. FPL 2013: 1-8 - [c15]Ricardo S. Ferreira, Vinicius Duarte, Waldir Meireles, Monica Magalhães Pereira, Luigi Carro, Stephan Wong:
A just-in-time modulo scheduling for virtual coarse-grained reconfigurable architectures. ICSAMOS 2013: 188-195 - 2012
- [c14]Adriano Donato Couto
, Fabio Ribeiro Cerqueira, Rafael Luciano Guerra, Luciana Brugiolo Gonçalves, Carlos de Castro Goulart, Rodrigo Siqueira-Batista, Ricardo dos Santos Ferreira, Alcione de Paiva Oliveira:
Theoretical Basis of a New Method for DNA Fragment Assembly in k-mer Graphs. SCCC 2012: 69-77 - [c13]Lucas Mucida, Vincius Lopes, Waldir Meireles, Ricardo S. Ferreira:
Problem Oriented Approach to Hardware-Assisted Algorithm Design in C: A Case Study for Scheduling, Placement and Routing. WSCAD-SSC 2012: 1-8 - [c12]Oberlan Christo Romão
, Luís Eduardo de Souza Amorim, Ricardo dos Santos Ferreira, Maurilio De Araujo Possi, Alcione de Paiva Oliveira:
Multiagent Systems Modeling Using GPUs - A Case Study of the Human Immune System. WSCAD-SSC 2012: 234-241 - 2011
- [j1]Ricardo S. Ferreira, João M. P. Cardoso
, Alex Damiany, Julio C. Goldner Vendramini, Tiago Teixeira:
Fast placement and routing by extending coarse-grained reconfigurable arrays with Omega Networks. J. Syst. Archit. 57(8): 761-777 (2011) - [c11]Ricardo S. Ferreira, Julio C. Goldner Vendramini, Lucas Mucida, Monica Magalhães Pereira, Luigi Carro
:
An FPGA-based heterogeneous coarse-grained dynamically reconfigurable architecture. CASES 2011: 195-204 - 2010
- [c10]Ricardo S. Ferreira, Julio C. Goldner Vendramini:
FPGA-accelerated Attractor Computation of Scale Free Gene Regulatory Networks. FPL 2010: 550-555
2000 – 2009
- 2009
- [c9]Ricardo S. Ferreira, Alex Damiany, Julio C. Goldner Vendramini, Tiago Teixeira, João M. P. Cardoso
:
On Simplifying Placement and Routing by Extending Coarse-Grained Reconfigurable Arrays with Omega Networks. ARC 2009: 145-156 - [c8]Ricardo S. Ferreira, Marcone Laure, Antonio Carlos Schneider Beck, Thiago Lo, Mateus B. Rutzig
, Luigi Carro
:
A low cost and adaptable routing network for reconfigurable systems. IPDPS 2009: 1-8 - [c7]Vitor Barbosa C. Souza
, Mauro Nacif Rocha, Ricardo Santos Ferreira, Carlos de Castro Goulart:
An implementation of the multi-geo routing protocol for wireless sensor networks using quadtrees. PE-WASUN 2009: 23-26 - 2008
- [c6]Ricardo S. Ferreira, Marcone Laure, Mateus B. Rutzig
, Antonio Carlos Schneider Beck, Luigi Carro
:
Reducing interconnection cost in coarse-grained dynamic computing through multistage network. FPL 2008: 47-52 - 2007
- [c5]Ricardo S. Ferreira, Alisson Garcia, Tiago Teixeira, João M. P. Cardoso
:
A Polynomial Placement Algorithm for Data Driven Coarse-Grained Reconfigurable Architectures. ISVLSI 2007: 61-66 - 2006
- [c4]Marcos Vinícius da Silva, Ricardo S. Ferreira, Alisson Garcia, João M. P. Cardoso
:
Mesh Mapping Exploration for Coarse-Grained Reconfigurable Array Architectures. ReConFig 2006: 20-29 - 2005
- [c3]Ricardo S. Ferreira, Antonio Carlos Schneider Beck, Luigi Carro, Andre Toledo, Aroldo Silva:
A Java Framework to Teach Computer Architecture. EDUTECH 2005: 25-35 - [c2]Ricardo S. Ferreira, João M. P. Cardoso, Andre Toledo, Horácio C. Neto:
Data-Driven Regular Reconfigurable Arrays: Design Space Exploration and Mapping. SAMOS 2005: 41-50 - 2004
- [c1]Ricardo S. Ferreira, João M. P. Cardoso
, Horácio C. Neto:
An Environment for Exploring Data-Driven Architectures. FPL 2004: 1022-1026
Coauthor Index
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last updated on 2024-08-05 21:18 CEST by the dblp team
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