35. ICCD 2017: Boston, MA, USA

Best Papers Session

Session 1A: Hardware Security I

Session 1B: Read-Write Optimizations for Non-Volatile Memory

Session 2A: Stochastic, Approximate, and Unary Computing

Session 2B: Energy-Efficiency through Heterogeneity

Session 3A: Debugging and Validation

Session 3B: Graph Processing and NoC Architectures

Session 4A: EDA with Focus on Multicore, FPGAs, and 3D

Session 4B: Hardware Acceleration for Neural Networks

Session 5A: Hardware Security II

Session 5B: Memory and Cache Optimizations

Session 6A: Verification and Fault Tolerance

Session 6B: Lithography and Patterning

Special Session 1: On How to Design and Manage Complex Heterogeneous Distributed Computing Systems

Session 7A: LCD with Focus on Emerging Technology

Session 7B: Power-Performance Optimization of Multicore Architecture

Session 8A: Synthesis and Security

Session 8B: Cloud and Storage Solutions

Special Session 2: Effective Voltage Scaling in Late CMOS Era

Special Session 3: Spin-Computing: Lower the Barrier between Memory and Logic

Session 9A: Architecture and Microarchitecture Optimizations

Session 9B: Novel Architecture with 3D and Flash Memory

maintained by Schloss Dagstuhl LZI at University of Trier