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Publication search results
found 85 matches
- 2016
- Amr M. S. Tosson Abdelwahed, Adam Neale, Mohab H. Anis, Lan Wei:
8T1R: A Novel Low-power High-speed RRAM-based Non-volatile SRAM Design. ACM Great Lakes Symposium on VLSI 2016: 239-244 - Ilia A. Bautista Adames, Jayita Das, Sanjukta Bhanja:
Survey of Emerging Technology Based Physical Unclonable Funtions. ACM Great Lakes Symposium on VLSI 2016: 317-322 - Tosiron Adegbija:
Exploring Configurable Non-Volatile Memory-based Caches for Energy-Efficient Embedded Systems. ACM Great Lakes Symposium on VLSI 2016: 157-162 - Hassan Afzali-Kusha, Alireza Shafaei, Massoud Pedram:
Optimizing the Operating Voltage of Tunnel FET-Based SRAM Arrays Equipped with Read/Write Assist Circuitry. ACM Great Lakes Symposium on VLSI 2016: 415-420 - Mohamad Hammam Alsafrjalani, Ann Gordon-Ross:
Quality of Service-Aware, Scalable Cache Tuning Algorithm in Consumer-based Embedded Devices. ACM Great Lakes Symposium on VLSI 2016: 357-360 - Ali Alsuwaiyan, Kartik Mohanram:
An Offline Frequent Value Encoding for Energy-Efficient MLC/TLC Non-volatile Memories. ACM Great Lakes Symposium on VLSI 2016: 403-408 - Cosimo Aprile, Luca Baldassarre, Vipul Gupta, Juhwan Yoo, Mahsa Shoaran, Yusuf Leblebici, Volkan Cevher:
Learning-Based Near-Optimal Area-Power Trade-offs in Hardware Design for Neural Signal Acquisition. ACM Great Lakes Symposium on VLSI 2016: 433-438 - Md Tanvir Arafin, Gang Qu:
Secret Sharing and Multi-user Authentication: From Visual Cryptography to RRAM Circuits. ACM Great Lakes Symposium on VLSI 2016: 169-174 - Yu Bai, Bo Hu, Weidong Kuang, Mingjie Lin:
Ultra-Robust Null Convention Logic Circuit with Emerging Domain Wall Devices. ACM Great Lakes Symposium on VLSI 2016: 251-256 - Nidhi Batra, Pawan Sehgal, Shashwat Kaushik, Mohammad S. Hashmi, Sudesh Bhalla, Anuj Grover:
Static Noise Margin based Yield Modelling of 6T SRAM for Area and Minimum Operating Voltage Improvement using Recovery Techniques. ACM Great Lakes Symposium on VLSI 2016: 117-120 - Yu Bi, Xiaobo Sharon Hu, Yier Jin, Michael T. Niemier, Kaveh Shamsi, Xunzhao Yin:
Enhancing Hardware Security with Emerging Transistor Technologies. ACM Great Lakes Symposium on VLSI 2016: 305-310 - Song Bian, Michihiro Shintani, Shumpei Morita, Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato:
Workload-Aware Worst Path Analysis of Processor-Scale NBTI Degradation. ACM Great Lakes Symposium on VLSI 2016: 203-208 - Rajendra Bishnoi, Fabian Oboril, Mehdi Baradaran Tahoori:
Low-Power Multi-Port Memory Architecture based on Spin Orbit Torque Magnetic Devices. ACM Great Lakes Symposium on VLSI 2016: 409-414 - Travis Boraten, Dominic DiTomaso, Avinash Karanth Kodi:
Secure Model Checkers for Network-on-Chip (NoC) Architectures. ACM Great Lakes Symposium on VLSI 2016: 45-50 - Tuhin Subhra Chakraborty, Santanu Kundu, Deepak Agrawal, Sanjay Tanaji Shinde, Jacob Mathews, Rekha K. James:
Leakage Power Minimization in Deep Sub-Micron Technology by Exploiting Positive Slacks of Dependent Paths. ACM Great Lakes Symposium on VLSI 2016: 365-368 - Yong Chen, Emil Matús, Gerhard P. Fettweis:
Trellis-search based Dynamic Multi-Path Connection Allocation for TDM-NoCs. ACM Great Lakes Symposium on VLSI 2016: 323-328 - Yukai Chen, Sara Vinco, Enrico Macii, Massimo Poncino:
Fast Thermal Simulation using SystemC-AMS. ACM Great Lakes Symposium on VLSI 2016: 427-432 - Yongsuk Choi, Yong-Bin Kim:
A Novel On-Chip Impedance Calibration Method for LPDDR4 Interface between DRAM and AP/SoC. ACM Great Lakes Symposium on VLSI 2016: 215-219 - Aditya Dalakoti, Carrie Segal, Merritt Miller, Forrest Brewer:
Asynchronous High Speed Serial Links Analysis using Integrated Charge for Event Detection. ACM Great Lakes Symposium on VLSI 2016: 121-124 - Subrata Das, Soma Das, Adrija Majumder, Parthasarathi Dasgupta, Debesh Kumar Das:
Delay Estimates for Graphene Nanoribbons: A Novel Measure of Fidelity and Experiments with Global Routing Trees. ACM Great Lakes Symposium on VLSI 2016: 263-268 - Jaya Dofe, Qiaoyan Yu, Hailang Wang, Emre Salman:
Hardware Security Threats and Potential Countermeasures in Emerging 3D ICs. ACM Great Lakes Symposium on VLSI 2016: 69-74 - Chaohui Du, Guoqiang Bai, Xingjun Wu:
High-Speed Polynomial Multiplier Architecture for Ring-LWE Based Public Key Cryptosystems. ACM Great Lakes Symposium on VLSI 2016: 9-14 - Deliang Fan:
Ultra-Low Energy Reconfigurable Spintronic Threshold Logic Gate. ACM Great Lakes Symposium on VLSI 2016: 385-388 - Kevin Fu:
Medical Device Security: The First 165 Years. ACM Great Lakes Symposium on VLSI 2016: 5 - Peng Gu, Shuangchen Li, Dylan C. Stow, Russell Barnes, Liu Liu, Yuan Xie, Eren Kursun:
Leveraging 3D Technologies for Hardware Security: Opportunities and Challenges. ACM Great Lakes Symposium on VLSI 2016: 347-352 - Xijing Han, Marco Donato, R. Iris Bahar, Alexander Zaslavsky, William R. Patterson:
Design of Error-Resilient Logic Gates with Reinforcement Using Implications. ACM Great Lakes Symposium on VLSI 2016: 191-196 - Qingda Hu, Guangyu Sun, Jiwu Shu, Chao Zhang:
Exploring Main Memory Design Based on Racetrack Memory Technology. ACM Great Lakes Symposium on VLSI 2016: 397-402 - Yu-Hsiang Hung, Sheng-Hsin Fang, Hung-Ming Chen, Shen-Min Chen, Chang-Tzu Lin, Chia-Hsin Lee:
A New Methodology for Noise Sensor Placement Based on Association Rule Mining. ACM Great Lakes Symposium on VLSI 2016: 81-86 - Mohsen Imani, Shruti Patil, Tajana Simunic Rosing:
DCC: Double Capacity Cache Architecture for Narrow-Width Values. ACM Great Lakes Symposium on VLSI 2016: 113-116 - Munish Jassi, Uzair Sharif, Daniel Müller-Gritschneder, Ulf Schlichtmann:
Hardware-Accelerated Software Library Drivers Generation for IP-Centric SoC Designs. ACM Great Lakes Symposium on VLSI 2016: 287-292
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