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Xingjun Wu
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2020 – today
- 2023
- [c12]Wentao Xi
, Xingjun Wu
, Kai Zhang
:
A low-cost configurable hash computing circuit for PQC algorithm. ICCNS 2023: 112-116 - 2022
- [c11]Jing Ye, Ruijuan Li, Min Zhang, Xingjun Wu, Qian Yang:
Elderly Nursing Monitoring System Based on DSP. AIAM 2022: 192-195 - 2021
- [c10]Dongmei Wei, Xingjun Wu, Guoqiang Bai, Linlin Su, Sufen Xu:
Attention-based Efficient Lightweight Model for Accurate Real-Time Face Verification on Embedded Device. ICCCS 2021: 385-392
2010 – 2019
- 2019
- [c9]Ru Ding, Xuemei Tian, Guoqiang Bai, Guangda Su, Xingjun Wu:
Hardware Implementation of Convolutional Neural Network for Face Feature Extraction. ASICON 2019: 1-4 - 2018
- [c8]Guoqiang Bai, Hailiang Fu, Wei Li, Xingjun Wu:
Differential Power Attack on SM4 Block Cipher. TrustCom/BigDataSE 2018: 1494-1497 - 2017
- [c7]Yi Wu, Xingjun Wu:
Implementation of efficient method of RSA key-pair generation algorithm. ISCE 2017: 72-73 - 2016
- [c6]Sulong Tang, Liji Wu, Xiangmin Zhang, Xingjun Wu, Beibei Wang:
A Novel Method of Correlation Power Analysis on SM4 Hardware Implementation. CIS 2016: 203-207 - [c5]Chaohui Du, Guoqiang Bai, Xingjun Wu:
High-Speed Polynomial Multiplier Architecture for Ring-LWE Based Public Key Cryptosystems. ACM Great Lakes Symposium on VLSI 2016: 9-14 - [c4]Hailiang Fu, Guoqiang Bai, Xingjun Wu:
A Very Compact Masked S-Box for High-Performance Implementation of SM4 Based on Composite Field. SecureComm 2016: 710-721 - [c3]Juhua Liu, Guoqiang Bai, Xingjun Wu:
Efficient Hardware Implementation of Roadrunner for Lightweight Application. Trustcom/BigDataSE/ISPA 2016: 224-227 - 2015
- [c2]Shaohui Zhang, Liji Wu, Xiangmin Zhang, Xingjun Wu, Xiangyu Li, Huajun Fang:
A Template Attack-Resistant Masking Scheme for RC4 Based on FPGA. CIS 2015: 381-384
2000 – 2009
- 2008
- [c1]Changming Ma, Xingjun Wu, Chun Zhang, Zhihua Wang:
A low-power RF front-end of passive UHF RFID transponders. APCCAS 2008: 73-76 - 2003
- [j1]Xingjun Wu, Hongyi Chen, Yihe Sun, Weixin Gai:
A Fully-Pipeline Linear Systolic Architecture for Modular Multiplier in Public-Key Crypto-Systems. J. VLSI Signal Process. 33(1-2): 191-197 (2003)
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