- Indira Rawat, M. K. Gupta, Virendra Singh:
Thermal analysis and modeling of 3D integrated circuits for test scheduling. 3DIC 2013: 1-5 - Valerio Re
, Massimo Manghisoni
, Gianluca Traversi
, Luigi Gaioni
, Alessia Manazza, Lodovico Ratti
:
Active pixel sensors with enhanced pixel-level analog and digital functionalities in a 2-tier 3D CMOS technology. 3DIC 2013: 1-7 - Surajit Kumar Roy, Sobitri Chatterjee, Chandan Giri
, Hafizur Rahaman
:
Faulty TSVs identification and recovery in 3D stacked ICs during pre-bond testing. 3DIC 2013: 1-6 - Cristiano Santos, Pascal Vivet
, Denis Dutoit, Philippe Garrault, Nicolas Peltier, Ricardo Reis
:
System-level thermal modeling for 3D circuits: Characterization with a 65nm memory-on-logic circuit. 3DIC 2013: 1-6 - Caleb Serafy, Bing Shi, Ankur Srivastava
, Donald Yeung:
High performance 3D stacked DRAM processor architectures with micro-fluidic cooling. 3DIC 2013: 1-8 - Jun-Yeob Song, Jae Hak Lee, Hyoung Joon Kim, Chang Woo Lee, Tae Ho Ha:
High reliability insert-bump bonding process for 3D integration. 3DIC 2013: 1-4 - Papa Momar Souare, François de Crecy, Vincent Fiori, M. Haykel Ben Jamaa, Alexis Farcy, Sébastien Gallois-Garreignot, Andras Borbely, Jean-Philippe Colonna, Perceval Coudrain
, B. Giraud, C. Laviron, Séverine Cheramy, Clément Tavernier, Jean Michailos:
Thermal correlation between measurements and FEM simulations in 3D ICs. 3DIC 2013: 1-6 - Edward J. Suh, Paul D. Franzon
:
Design of 60 GHz contactless probe system for RDL in passive silicon interposer. 3DIC 2013: 1-5 - Yuri Sylvester, Luke Hunter, Bruce Johnson, Raleigh Estrada:
3D X-ray microscopy: A near-SEM non-destructive imaging technology used in the development of 3D IC packaging. 3DIC 2013: 1-7 - Jubee Tada, Ryusuke Egawa, Hiroaki Kobayashi:
Design of a 3-D stacked floating-point adder. 3DIC 2013: 1-4 - Satoshi Takaya, Makoto Nagata
, Hiroaki Ikeda:
Very low-voltage swing while high-bandwidth data transmission through 4096 bit TSVs. 3DIC 2013: 1-4 - Mottaqiallah Taouil, Said Hamdioui, Erik Jan Marinissen
, Sudipta Bhawmik:
Using 3D-COSTAR for 2.5D test cost optimization. 3DIC 2013: 1-8 - Nyunyi M. Tshibangu, Paul D. Franzon
, Eric Rotenberg, William Rhett Davis
:
Design of controller for L2 cache mapped in Tezzaron stacked DRAM. 3DIC 2013: 1-4 - Thomas Uhrmann, Thorsten Matthias, Markus Wimplinger, Jurgen Burggraf, Daniel Burgstaller, Harald Wiesbauer, Paul Lindner:
Recent progress in thin wafer processing. 3DIC 2013: 1-8 - Dimitrios Velenis, Mikael Detalle, Erik Jan Marinissen
, Eric Beyne
:
Si interposer build-up options and impact on 3D system cost. 3DIC 2013: 1-5 - Benjamin Vianne, Pierre Bar, Vincent Fiori, Sebastien Petitdidier, Norbert Chevrier, Sébastien Gallois-Garreignot, Alexis Farcy, Pascal Chausse, Stephanie Escoubas, Nicolas Hotellier, Olivier Thomas:
Thermo-mechanical study of a 2.5D passive silicon interposer technology: Experimental, numerical and In-Situ stress sensors developments. 3DIC 2013: 1-7 - William Wahby, Ashish Dembla, Muhannad S. Bakir:
Evaluation of 3DICs and fabrication of monolithic interlayer vias. 3DIC 2013: 1-6 - Jiacheng Wang, Shunli Ma, Sai Manoj Pudukotai Dinakarrao
, Mingbin Yu, Roshan Weerasekera
, Hao Yu:
High-speed and low-power 2.5D I/O circuits for memory-logic-integration by through-silicon interposer. 3DIC 2013: 1-4 - Awet Yemane Weldezion, Matt Grange, Dinesh Pamunuwa
, Axel Jantsch
, Hannu Tenhunen:
A scalable multi-dimensional NoC simulation model for diverse spatio-temporal traffic patterns. 3DIC 2013: 1-5 - Frank Windrich
, Andreas Schenke:
Front to backside alignment for TSV based 3D integration. 3DIC 2013: 1-6 - Onnik Yaglioglu, Ben Eldridge:
Contact testing of copper micro-pillars with very low damage for 3D IC assembly. 3DIC 2013: 1-4 - Leonid Yavits, Amir Morad, Ran Ginosar:
3D cache hierarchy optimization. 3DIC 2013: 1-5 - Yang Yi, Yaping Zhou:
A novel circuit model for multiple Through Silicon Vias (TSVs) in 3D IC. 3DIC 2013: 1-4 - Zhenqian Zhang, Paul D. Franzon
:
TSV-based, modular and collision detectable face-to-back shared bus design. 3DIC 2013: 1-5 - Bei Zhang, Baohu Li, Vishwani D. Agrawal:
Yield analysis of a novel wafer manipulation method in 3D stacking. 3DIC 2013: 1-8 - Zhenqian Zhang, Brandon Noia, Krishnendu Chakrabarty
, Paul D. Franzon
:
Face-to-face bus design with built-in self-test in 3D ICs. 3DIC 2013: 1-7 - Yue Zhang, Hanju Oh, Muhannad S. Bakir:
Within-tier cooling and thermal isolation technologies for heterogeneous 3D ICs. 3DIC 2013: 1-6 - Jiye Zhang, Lin Zhang, Yuanwei Dong, Hongyu Li, Cher Ming Tan, Guangrui Xia, Chuan Seng Tan
:
The dependency of TSV keep-out zone (KOZ) on Si crystal direction and liner material. 3DIC 2013: 1-5 - Qiuling Zhu, Berkin Akin, Huseyin Ekin Sumbul, Fazle Sadi, James C. Hoe, Larry T. Pileggi, Franz Franchetti:
A 3D-stacked logic-in-memory accelerator for application-specific data intensive computing. 3DIC 2013: 1-7 - 2013 IEEE International 3D Systems Integration Conference (3DIC), San Francisco, CA, USA, October 2-4, 2013. IEEE 2013, ISBN 978-1-4673-6484-3 [contents]