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ORCIDJhih-Rong Gao
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2020 – today
- 2020
[j7]Yuzhe Ma
, Wei Zhong, Shuxiang Hu, Jhih-Rong Gao, Jian Kuang, Jin Miao, Bei Yu:
A Unified Framework for Simultaneous Layout Decomposition and Mask Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 5069-5082 (2020)
2010 – 2019
- 2018
- [j6]Yibo Lin, Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, Natarajan Viswanathan, Wen-Hao Liu, Zhuo Li, Charles J. Alpert, David Z. Pan:
MrDP: Multiple-Row Detailed Placement of Heterogeneous-Sized Cells for Advanced Nodes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(6): 1237-1250 (2018) - 2017
- [c16]Yuzhe Ma, Jhih-Rong Gao, Jian Kuang, Jin Miao, Bei Yu:
A unified framework for simultaneous layout decomposition and mask optimization. ICCAD 2017: 81-88 - 2016
- [j5]Xiaoqing Xu, Bei Yu, Jhih-Rong Gao, Che-Lun Hsu, David Z. Pan:
PARR: Pin-Access Planning and Regular Routing for Self-Aligned Double Patterning. ACM Trans. Design Autom. Electr. Syst. 21(3): 42:1-42:21 (2016) - [j4]Bei Yu, Kun Yuan, Jhih-Rong Gao, Shiyan Hu, David Z. Pan:
EBL Overlapping Aware Stencil Planning for MCC System. ACM Trans. Design Autom. Electr. Syst. 21(3): 43:1-43:24 (2016) - [c15]Yibo Lin, Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, Natarajan Viswanathan, Wen-Hao Liu, Zhuo Li, Charles J. Alpert, David Z. Pan:
MrDP: multiple-row detailed placement of heterogeneous-sized cells for advanced nodes. ICCAD 2016: 7 - 2015
- [j3]Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, Yibo Lin, Zhuo Li, Charles J. Alpert, David Z. Pan:
Methodology for Standard Cell Compliance and Detailed Placement for Triple Patterning Lithography. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(5): 726-739 (2015) - [c14]Xiaoqing Xu, Bei Yu, Jhih-Rong Gao, Che-Lun Hsu, David Z. Pan:
PARR: pin access planning and regular routing for self-aligned double patterning. DAC 2015: 28:1-28:6 - [c13]Jiaojiao Ou, Bei Yu, Jhih-Rong Gao, David Z. Pan, Moshe Preil, Azat Latypov:
Directed Self-Assembly Based Cut Mask Optimization for Unidirectional Design. ACM Great Lakes Symposium on VLSI 2015: 83-86 - [i8]Bei Yu, Kun Yuan, Jhih-Rong Gao, David Z. Pan:
E-BLOW: E-Beam Lithography Overlapping aware Stencil Planning for MCC System. CoRR abs/1502.00621 (2015) - 2014
- [c12]Jhih-Rong Gao, Bei Yu, David Z. Pan:
Self-aligned double patterning layout decomposition with complementary e-beam lithography. ASP-DAC 2014: 143-148 - [c11]Jhih-Rong Gao, Xiaoqing Xu, Bei Yu, David Z. Pan:
MOSAIC: Mask Optimizing Solution With Process Window Aware Inverse Correction. DAC 2014: 52:1-52:6 - [i7]Bei Yu, Jhih-Rong Gao, David Z. Pan:
L-Shape based Layout Fracturing for E-Beam Lithography. CoRR abs/1402.2420 (2014) - [i6]Bei Yu, Jhih-Rong Gao, David Z. Pan:
Triple Patterning Lithography (TPL) Layout Decomposition using End-Cutting. CoRR abs/1402.2425 (2014) - [i5]Bei Yu, Kun Yuan, Jhih-Rong Gao, David Z. Pan:
E-BLOW: E-Beam Lithography Overlapping aware Stencil Planning for MCC System. CoRR abs/1402.2435 (2014) - [i4]Jhih-Rong Gao, Bei Yu, Ru Huang, David Z. Pan:
Self-Aligned Double Patterning Friendly Configuration for Standard Cell Library Considering Placement. CoRR abs/1402.2442 (2014) - [i3]Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, David Z. Pan:
Methodology for standard cell compliance and detailed placement for triple patterning lithography. CoRR abs/1402.2635 (2014) - [i2]Jhih-Rong Gao, Bei Yu, David Z. Pan:
Lithography Hotspot Detection and Mitigation in Nanometer VLSI. CoRR abs/1402.3150 (2014) - [i1]Bei Yu, Subhendu Roy, Jhih-Rong Gao, David Z. Pan:
Triple Patterning Lithography (TPL) Layout Decomposition using End-Cutting (JM3 Special Session). CoRR abs/1408.0407 (2014) - 2013
- [j2]David Z. Pan, Bei Yu, Jhih-Rong Gao:
Design for Manufacturing With Emerging Nanolithography. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(10): 1453-1472 (2013) - [c10]Jhih-Rong Gao, Bei Yu, Duo Ding, David Z. Pan:
Lithography hotspot detection and mitigation in nanometer VLSI. ASICON 2013: 1-4 - [c9]Bei Yu, Jhih-Rong Gao, David Z. Pan:
L-shape based layout fracturing for e-beam lithography. ASP-DAC 2013: 249-254 - [c8]Bei Yu, Kun Yuan, Jhih-Rong Gao, David Z. Pan:
E-BLOW: e-beam lithography overlapping aware stencil planning for MCC system. DAC 2013: 70:1-70:7 - [c7]Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, David Z. Pan:
Methodology for standard cell compliance and detailed placement for triple patterning lithography. ICCAD 2013: 349-356 - 2012
- [c6]Bei Yu, Jhih-Rong Gao, Duo Ding, Yongchan Ban, Jae-Seok Yang, Kun Yuan, Minsik Cho, David Z. Pan:
Dealing with IC manufacturability in extreme scaling (Embedded tutorial paper). ICCAD 2012: 240-242 - [c5]Jhih-Rong Gao, David Z. Pan:
Flexible self-aligned double patterning aware detailed routing with prescribed layout planning. ISPD 2012: 25-32 - [c4]David Z. Pan, Jhih-Rong Gao, Bei Yu:
VLSI CAD for emerging nanolithography. VLSI-DAT 2012: 1-4 - 2011
- [c3]Duo Ding, Jhih-Rong Gao, Kun Yuan, David Z. Pan:
AENEID: a generic lithography-friendly detailed router based on post-RET data learning and hotspot detection. DAC 2011: 795-800 - 2010
- [j1]Yen-Jung Chang, Yu-Ting Lee, Jhih-Rong Gao, Pei-Ci Wu, Ting-Chi Wang:
NTHU-Route 2.0: A Robust Global Router for Modern Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(12): 1931-1944 (2010)
2000 – 2009
- 2008
- [c2]Jhih-Rong Gao, Pei-Ci Wu, Ting-Chi Wang:
A new global router for modern designs. ASP-DAC 2008: 232-237 - 2007
- [c1]Pei-Ci Wu, Jhih-Rong Gao, Ting-Chi Wang:
A Fast and Stable Algorithm for Obstacle-Avoiding Rectilinear Steiner Minimal Tree Construction. ASP-DAC 2007: 262-267
Coauthor Index
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