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ORCIDDean M. Tullsen
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- affiliation: University of California, San Diego, USA
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2020 – today
- 2024
[j41]Shravan Narayan
, Tal Garfinkel, Mohammadkazem Taram, Joey Rudek, Daniel Moghimi, Evan Johnson, Chris Fallin, Anjo Vahldiek-Oberwagner, Michael LeMay, Ravi Sahita, Dean M. Tullsen, Deian Stefan:
Hardware-Assisted Fault Isolation: Going Beyond the Limits of Software-Based Sandboxing. IEEE Micro 44(4): 70-79 (2024)- [c119]Hosein Yavarzadeh, Archit Agarwal, Max Christman, Christina Garman, Daniel Genkin, Andrew Kwong, Daniel Moghimi, Deian Stefan, Kazem Taram, Dean M. Tullsen:
Pathfinder: High-Resolution Control-Flow Attacks Exploiting the Conditional Branch Predictor. ASPLOS (3) 2024: 770-784 - [c118]Bhargav Reddy Godala, Sankara Prasad Ramesh, Gilles A. Pokam, Jared Stark, André Seznec, Dean M. Tullsen, David I. August:
PDIP: Priority Directed Instruction Prefetching. ASPLOS (2) 2024: 846-861 - [c117]Luyi Li, Hosein Yavarzadeh, Dean M. Tullsen:
Indirector: High-Precision Branch Target Injection Attacks Exploiting the Indirect Branch Predictor. USENIX Security Symposium 2024 - 2023
- [c116]Shravan Narayan, Tal Garfinkel, Mohammadkazem Taram, Joey Rudek, Daniel Moghimi, Evan Johnson, Chris Fallin, Anjo Vahldiek-Oberwagner, Michael LeMay, Ravi Sahita, Dean M. Tullsen, Deian Stefan:
Going beyond the Limits of SFI: Flexible and Secure Hardware-Assisted In-Process Isolation with HFI. ASPLOS (3) 2023: 266-281 - [c115]Hosein Yavarzadeh, Mohammadkazem Taram, Shravan Narayan, Deian Stefan, Dean M. Tullsen:
Half&Half: Demystifying Intel's Directional Branch Predictors for Fast, Secure Partitioned Execution. SP 2023: 1220-1237 - [c114]Hosein Yavarzadeh, Mohammadkazem Taram, Shravan Narayan, Deian Stefan, Dean M. Tullsen:
Half&Half: Demystifying Intel's Directional Branch Predictors for Fast, Secure Partitioned Execution. SP 2023: 1220-1237 - [c113]Zixuan Wang, Mohammadkazem Taram, Daniel Moghimi, Steven Swanson, Dean M. Tullsen, Jishen Zhao:
NVLeak: Off-Chip Side-Channel Attacks via Non-Volatile Memory Systems. USENIX Security Symposium 2023: 6771-6788 - 2022
- [j40]Mohammadkazem Taram, Ashish Venkat, Dean M. Tullsen:
Mitigating Speculative Execution Attacks via Context-Sensitive Fencing. IEEE Des. Test 39(4): 49-57 (2022) - [c112]Samira Mirbagher Ajorpaz, Daniel Moghimi, Jeffrey Neal Collins, Gilles Pokam, Nael B. Abu-Ghazaleh, Dean M. Tullsen:
EVAX: Towards a Practical, Pro-active & Adaptive Architecture for High Performance & Security. MICRO 2022: 1218-1236 - [c111]Mohammadkazem Taram, Xida Ren, Ashish Venkat, Dean M. Tullsen:
SecSMT: Securing SMT Processors against Contention-Based Covert Channels. USENIX Security Symposium 2022: 3165-3182 - 2021
- [j39]Marco Vassena, Craig Disselkoen, Klaus von Gleissenthall, Sunjay Cauligi, Rami Gökhan Kici, Ranjit Jhala, Dean M. Tullsen, Deian Stefan:
Automatically eliminating speculative leaks from cryptographic code with blade. Proc. ACM Program. Lang. 5(POPL): 1-30 (2021) - [c110]Xida Ren, Logan Moody, Mohammadkazem Taram, Matthew Jordan, Dean M. Tullsen, Ashish Venkat:
I See Dead µops: Leaking Secrets via Intel/AMD Micro-Op Caches. ISCA 2021: 361-374 - [c109]Shravan Narayan, Craig Disselkoen, Daniel Moghimi, Sunjay Cauligi, Evan Johnson, Zhao Gang, Anjo Vahldiek-Oberwagner, Ravi Sahita, Hovav Shacham, Dean M. Tullsen, Deian Stefan:
Swivel: Hardening WebAssembly against Spectre. USENIX Security Symposium 2021: 1433-1450 - [c108]Fatemehsadat Mireshghallah, Mohammadkazem Taram, Ali Jalali, Ahmed Taha Elthakeb, Dean M. Tullsen, Hadi Esmaeilzadeh:
Not All Features Are Equal: Discovering Essential Features for Preserving Prediction Privacy. WWW 2021: 669-680 - [i5]Shravan Narayan, Craig Disselkoen, Daniel Moghimi, Sunjay Cauligi, Evan Johnson, Zhao Gang, Anjo Vahldiek-Oberwagner, Ravi Sahita, Hovav Shacham, Dean M. Tullsen, Deian Stefan:
Swivel: Hardening WebAssembly against Spectre. CoRR abs/2102.12730 (2021) - [i4]Andreas Prodromou, Ashish Venkat, Dean M. Tullsen:
Agon: A Scalable Competitive Scheduler for Large Heterogeneous Systems. CoRR abs/2109.00665 (2021) - 2020
- [j38]Minxuan Zhou, Andreas Prodromou, Rui Wang, Hailong Yang, Depei Qian, Dean M. Tullsen:
Temperature-Aware DRAM Cache Management - Relaxing Thermal Constraints in 3-D Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 1973-1986 (2020) - [c107]Fatemehsadat Mireshghallah, Mohammadkazem Taram, Prakash Ramrakhyani, Ali Jalali, Dean M. Tullsen, Hadi Esmaeilzadeh:
Shredder: Learning Noise Distributions to Protect Inference Privacy. ASPLOS 2020: 3-18 - [c106]Mohammadkazem Taram, Ashish Venkat, Dean M. Tullsen:
Packet Chasing: Spying on Network Packets over a Cache Side-Channel. ISCA 2020: 721-734 - [c105]Sunjay Cauligi, Craig Disselkoen, Klaus von Gleissenthall, Dean M. Tullsen, Deian Stefan, Tamara Rezk, Gilles Barthe:
Constant-time foundations for the new spectre era. PLDI 2020: 913-926 - [i3]Fatemehsadat Mireshghallah, Mohammadkazem Taram, Ali Jalali, Ahmed Taha Elthakeb, Dean M. Tullsen, Hadi Esmaeilzadeh:
A Principled Approach to Learning Stochastic Representations for Privacy in Deep Neural Inference. CoRR abs/2003.12154 (2020)
2010 – 2019
- 2019
- [j37]Mohammadkazem Taram, Ashish Venkat, Dean M. Tullsen:
Context-Sensitive Decoding: On-Demand Microcode Customization for Security and Energy Management. IEEE Micro 39(3): 75-83 (2019) - [c104]Mohammadkazem Taram, Ashish Venkat, Dean M. Tullsen:
Context-Sensitive Fencing: Securing Speculative Execution via Microcode Customization. ASPLOS 2019: 395-410 - [c103]Ashish Venkat, Harsha Basavaraj, Dean M. Tullsen:
Composite-ISA Cores: Enabling Multi-ISA Heterogeneity Using a Single ISA. HPCA 2019: 42-55 - [c102]Manish Arora, Matt Skach, Wei Huang, Xudong An, Jason Mars, Lingjia Tang, Dean M. Tullsen:
Understanding the Impact of Socket Density in Density Optimized Servers. HPCA 2019: 687-700 - [c101]Andreas Prodromou, Ashish Venkat, Dean M. Tullsen:
Deciphering Predictive Schedulers for Heterogeneous-ISA Multicore Architectures. PMAM@PPoPP 2019: 51-60 - [c100]Andreas Prodromou, Ashish Venkat, Dean M. Tullsen:
Platform-Agnostic Learning-Based Scheduling. SAMOS 2019: 142-154 - [i2]Fatemehsadat Mireshghallah, Mohammadkazem Taram, Prakash Ramrakhyani, Dean M. Tullsen, Hadi Esmaeilzadeh:
Shredder: Learning Noise to Protect Privacy with Partial DNN Inference on the Edge. CoRR abs/1905.11814 (2019) - [i1]Mohammadkazem Taram, Ashish Venkat, Dean M. Tullsen:
Packet Chasing: Spying on Network Packets over a Cache Side-Channel. CoRR abs/1909.04841 (2019) - 2018
- [c99]Manish Gupta, Vilas Sridharan, David Roberts, Andreas Prodromou, Ashish Venkat, Dean M. Tullsen, Rajesh K. Gupta:
Reliability-Aware Data Placement for Heterogeneous Memory Architecture. HPCA 2018: 583-595 - [c98]Matt Skach, Manish Arora, Dean M. Tullsen, Lingjia Tang, Jason Mars:
Virtual Melting Temperature: Managing Server Load to Minimize Cooling Overhead with Phase Change Materials. ISCA 2018: 15-28 - [c97]Mohammadkazem Taram, Ashish Venkat, Dean M. Tullsen:
Mobilizing the Micro-Ops: Exploiting Context Sensitive Decoding for Security and Energy Efficiency. ISCA 2018: 624-637 - 2017
- [j36]Matt Skach, Manish Arora, Chang-Hong Hsu, Qi Li, Dean M. Tullsen, Lingjia Tang, Jason Mars:
Thermal Time Shifting: Decreasing Data Center Cooling Costs with Phase-Change Materials. IEEE Internet Comput. 21(4): 34-43 (2017) - [c96]Manish Gupta, Daniel Lowell, John Kalamatianos, Steven Raasch, Vilas Sridharan, Dean M. Tullsen, Rajesh K. Gupta:
Compiler Techniques to Reduce the Synchronization Overhead of GPU Redundant Multithreading. DAC 2017: 65:1-65:6 - [c95]Andreas Prodromou, Mitesh R. Meswani, Nuwan Jayasena, Gabriel H. Loh, Dean M. Tullsen:
MemPod: A Clustered Architecture for Efficient and Scalable Migration in Flat Address Space Multi-level Memories. HPCA 2017: 433-444 - [c94]Maria Malik, Dean M. Tullsen, Houman Homayoun:
Co-locating and concurrent fine-tuning MapReduce applications on microservers for energy efficiency. IISWC 2017: 22-31 - [c93]Craig Disselkoen, David Kohlbrenner, Leo Porter, Dean M. Tullsen:
Prime+Abort: A Timer-Free High-Precision L3 Cache Attack using Intel TSX. USENIX Security Symposium 2017: 51-67 - 2016
- [j35]Alex D. Breslow, Leo Porter, Ananta Tiwari, Michael Laurenzano, Laura Carrington, Dean M. Tullsen, Allan Snavely:
The case for colocation of high performance computing workloads. Concurr. Comput. Pract. Exp. 28(2): 232-251 (2016) - [c92]Ashish Venkat, Sriskanda Shamasunder, Hovav Shacham, Dean M. Tullsen:
HIPStR: Heterogeneous-ISA Program State Relocation. ASPLOS 2016: 727-741 - [c91]Manish Gupta, David Roberts, Mitesh R. Meswani, Vilas Sridharan, Dean M. Tullsen, Rajesh K. Gupta:
Reliability and Performance Trade-off Study of Heterogeneous Memories. MEMSYS 2016: 395-401 - [c90]Alex D. Breslow, Dong Ping Zhang, Joseph L. Greathouse, Nuwan Jayasena, Dean M. Tullsen:
Horton Tables: Fast Hash Tables for In-Memory Data-Intensive Computing. USENIX ATC 2016: 281-294 - 2015
- [j34]Ravi R. Iyer, Dean M. Tullsen:
Heterogeneous Computing [Guest editors' introduction]. IEEE Micro 35(4): 4-5 (2015) - [c89]Manish Arora, Srilatha Manne, Indrani Paul, Nuwan Jayasena, Dean M. Tullsen:
Understanding idle behavior and power gating mechanisms in the context of modern benchmarks on CPU-GPU Integrated systems. HPCA 2015: 366-377 - [c88]Matt Skach, Manish Arora, Chang-Hong Hsu, Qi Li, Dean M. Tullsen, Lingjia Tang, Jason Mars:
Thermal time shifting: leveraging phase change materials to reduce cooling costs in warehouse-scale computers. ISCA 2015: 439-449 - [c87]Rajib Nath, Dean M. Tullsen:
The CRISP performance model for dynamic voltage and frequency scaling in a GPGPU. MICRO 2015: 281-293 - 2014
- [j33]Hamid Mahmoodi, Sridevi Srinivasan Lakshmipuram, Manish Arora, Yashar Asgarieh, Houman Homayoun, Bill Lin, Dean M. Tullsen:
Resistive Computation: A Critique. IEEE Comput. Archit. Lett. 13(2): 89-92 (2014) - [j32]Stephen W. Keckler, Dean M. Tullsen:
2014 International Symposium on Computer Architecture Influential Paper Award; 2014 Maurice Wilkes Award Given to Ravi Rajwar. IEEE Micro 34(6): 95-97 (2014) - [c86]Vasileios Kontorinis, Mohammad Khavari Tavana, Mohammad Hossein Hajkazemi, Dean M. Tullsen, Houman Homayoun:
Enabling Dynamic Heterogeneity Through Core-on-Core Stacking. DAC 2014: 182:1-182:6 - [c85]Hung-Wei Tseng, Dean M. Tullsen:
CDTT: Compiler-generated data-triggered threads. HPCA 2014: 650-661 - [c84]Fulya Kaplan, Charlie De Vivero, Samuel Howes, Manish Arora, Houman Homayoun, Wayne P. Burleson, Dean M. Tullsen, Ayse K. Coskun:
Modeling and analysis of Phase Change Materials for efficient thermal management. ICCD 2014: 256-263 - [c83]Ashish Venkat, Dean M. Tullsen:
Harnessing ISA diversity: Design of a heterogeneous-ISA chip multiprocessor. ISCA 2014: 121-132 - [c82]Manish Arora, Srilatha Manne, Yasuko Eckert, Indrani Paul, Nuwan Jayasena, Dean M. Tullsen:
A comparison of core power gating strategies implemented in modern hardware. SIGMETRICS 2014: 559-560 - 2013
- [b2]Mario Nemirovsky, Dean M. Tullsen:
Multithreading Architecture. Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers 2013, ISBN 9781608458554 - [j31]Sheng Li, Jung Ho Ahn, Richard D. Strong, Jay B. Brockman, Dean M. Tullsen, Norman P. Jouppi:
The McPAT Framework for Multicore and Manycore Architectures: Simultaneously Modeling Power, Area, and Timing. ACM Trans. Archit. Code Optim. 10(1): 5:1-5:29 (2013) - [j30]Enric Herrero, José González, Ramon Canal, Dean M. Tullsen:
Thread Row Buffers: Improving Memory Performance Isolation and Throughput in Multiprogrammed Environments. IEEE Trans. Computers 62(9): 1879-1892 (2013) - [c81]Abbas BanaiyanMofrad, Houam Homayoun, Vasileios Kontorinis, Dean M. Tullsen, Nikil D. Dutt:
REMEDIATE: A scalable fault-tolerant architecture for low-power NUCA cache in tiled CMPs. IGCC 2013: 1-10 - [c80]Nikolaos Strikos, Vasileios Kontorinis, Xiangyu Dong, Houman Homayoun, Dean M. Tullsen:
Low-current probabilistic writes for power-efficient STT-RAM caches. ICCD 2013: 511-514 - [c79]Md. Kamruzzaman, Steven Swanson, Dean M. Tullsen:
Load-balanced pipeline parallelism. SC 2013: 14:1-14:12 - 2012
- [j29]Hung-Wei Tseng, Dean M. Tullsen:
Eliminating Redundant Computation and Exposing Parallelism through Data-Triggered Threads. IEEE Micro 32(3): 38-47 (2012) - [j28]Md. Kamruzzaman, Steven Swanson, Dean M. Tullsen:
Underclocked Software Prefetching: More Cores, Less Energy. IEEE Micro 32(4): 32-41 (2012) - [j27]Manish Arora, Siddhartha Nath, Subhra Mazumdar, Scott B. Baden, Dean M. Tullsen:
Redefining the Role of the CPU in the Era of CPU-GPU Integration. IEEE Micro 32(6): 4-16 (2012) - [c78]Md. Kamruzzaman, Steven Swanson, Dean M. Tullsen:
Coalition threading: combining traditional andnon-traditional parallelism to maximize scalability. PACT 2012: 273-282 - [c77]Matthew DeVuyst, Ashish Venkat, Dean M. Tullsen:
Execution migration in a heterogeneous-ISA chip multiprocessor. ASPLOS 2012: 261-272 - [c76]Gaurav Dhiman, Vasileios Kontorinis, Raid Zuhair Ayoub, Liuyi Eric Zhang, Chris Sadler, Dean M. Tullsen, Tajana Simunic Rosing:
Themis: Energy Efficient Management of Workloads in Virtualized Data Centers. Euro-Par Workshops 2012: 557-566 - [c75]Houman Homayoun, Vasileios Kontorinis, Amirali Shayan, Ta-Wei Lin, Dean M. Tullsen:
Dynamically heterogeneous cores through 3D resource pooling. HPCA 2012: 323-334 - [c74]John S. Seng, Dean M. Tullsen, George Z. N. Cai:
Retrospective on "Power-Sensitive Multithreaded Architecture". ICCD 2012: 15-16 - [c73]John S. Seng, Dean M. Tullsen, George Z. N. Cai:
Power-sensitive multithreaded architecture. ICCD 2012: 17-24 - [c72]Vasileios Kontorinis, Liuyi Eric Zhang, Baris Aksanli, Jack Sampson, Houman Homayoun, Eddie Pettis, Dean M. Tullsen, Tajana Simunic Rosing:
Managing distributed UPS energy for effective power capping in data centers. ISCA 2012: 488-499 - [c71]Houman Homayoun, Mehryar Rahmatian, Vasileios Kontorinis, Shahin Golshan, Dean M. Tullsen:
Hot peripheral thermal management to mitigate cache temperature variation. ISQED 2012: 755-763 - [c70]Hung-Wei Tseng, Dean M. Tullsen:
Software data-triggered threads. OOPSLA 2012: 703-716 - [c69]Manish Arora, Feng Wang, Bob Rychlik, Dean M. Tullsen:
Efficient system design using the Statistical Analysis of Architectural Bottlenecks methodology. ICSAMOS 2012: 217-226 - [c68]Manish Arora, Feng Wang, Bob Rychlik, Dean M. Tullsen:
Fast cost efficient designs by building upon the plackett and burman method. SIGMETRICS 2012: 419-420 - 2011
- [j26]Subhradyuti Sarkar, Dean M. Tullsen:
Data Layout for Cache Performance on a Multithreaded Architecture. Trans. High Perform. Embed. Archit. Compil. 3: 43-68 (2011) - [c67]Md. Kamruzzaman, Steven Swanson, Dean M. Tullsen:
Inter-core prefetching for multicore processors using migrating helper threads. ASPLOS 2011: 393-404 - [c66]Matthew DeVuyst, Dean M. Tullsen, Seon Wook Kim:
Runtime parallelization of legacy code on a transactional memory system. HiPEAC 2011: 127-136 - [c65]Hung-Wei Tseng, Dean M. Tullsen:
Data-triggered threads: Eliminating redundant computation. HPCA 2011: 181-192 - [c64]Jeffery A. Brown, Leo Porter, Dean M. Tullsen:
Fast thread migration via cache working set prediction. HPCA 2011: 193-204 - 2010
- [c63]Subhra Mazumdar, Dean M. Tullsen, Justin J. Song:
Inter-socket victim cacheing for platform power reduction. ICCD 2010: 509-514 - [c62]Gaurav Dhiman, Vasileios Kontorinis, Dean M. Tullsen, Tajana Rosing, Eric Saxe, Jonathan Chew:
Dynamic workload characterization for power efficient scheduling on CMP systems. ISLPED 2010: 437-442 - [c61]Md. Kamruzzaman, Steven Swanson, Dean M. Tullsen:
Software data spreading: leveraging distributed caches to improve single thread performance. PLDI 2010: 460-470
2000 – 2009
- 2009
- [j25]Joel S. Emer, Dean M. Tullsen:
Guest Editors' Introduction: Top Picks from the 2008 Computer Architecture Conferences. IEEE Micro 29(1): 6-9 (2009) - [j24]Norman P. Jouppi, Rakesh Kumar, Dean M. Tullsen:
Introduction to the special issue on the 2008 workshop on design, analysis, and simulation of chip multiprocessors (dasCMP'08). SIGARCH Comput. Archit. News 37(2): 1 (2009) - [j23]Richard D. Strong, Jayaram Mudigonda, Jeffrey C. Mogul, Nathan L. Binkert, Dean M. Tullsen:
Fast switching of threads between cores. ACM SIGOPS Oper. Syst. Rev. 43(2): 35-45 (2009) - [c60]Leo Porter, Bumyong Choi, Dean M. Tullsen:
Mapping Out a Path from Hardware Transactional Memory to Speculative Multithreading. PACT 2009: 313-324 - [c59]Leo Porter, Dean M. Tullsen:
Creating artificial global history to improve branch prediction accuracy. ICS 2009: 266-275 - [c58]Vasileios Kontorinis, Amirali Shayan, Dean M. Tullsen, Rakesh Kumar:
Reducing peak power with a table-driven adaptive processor core. MICRO 2009: 189-200 - [c57]Sheng Li, Jung Ho Ahn, Richard D. Strong, Jay B. Brockman, Dean M. Tullsen, Norman P. Jouppi:
McPAT: an integrated power, area, and timing modeling framework for multicore and manycore architectures. MICRO 2009: 469-480 - [c56]Ayse K. Coskun, Richard D. Strong, Dean M. Tullsen, Tajana Simunic Rosing:
Evaluating the impact of job scheduling and power management on processor lifetime for chip multiprocessors. SIGMETRICS/Performance 2009: 169-180 - 2008
- [j22]Norman P. Jouppi, Rakesh Kumar, Dean M. Tullsen:
Introduction to the special issue on the 2007 workshop on design, analysis, and simulation of chip multiprocessors (dasCMP'07). SIGARCH Comput. Archit. News 36(2): 1 (2008) - [j21]Brad Calder, Dean M. Tullsen:
Editorial. ACM Trans. Archit. Code Optim. 5(1): 1:1 (2008) - [j20]Carlos Madriles, Carlos García Quiñones, F. Jesús Sánchez, Pedro Marcuello, Antonio González, Dean M. Tullsen, Hong Wang, John Paul Shen:
Mitosis: A Speculative Multithreaded Processor Based on Precomputation Slices. IEEE Trans. Parallel Distributed Syst. 19(7): 914-925 (2008) - [c55]Bumyong Choi, Leo Porter, Dean M. Tullsen:
Accurate branch prediction for short threads. ASPLOS 2008: 125-134 - [c54]Subhradyuti Sarkar, Dean M. Tullsen:
Compiler Techniques for Reducing Data Cache Miss Rate on a Multithreaded Architecture. HiPEAC 2008: 353-368 - [c53]Jeffery A. Brown, Dean M. Tullsen:
The shared-thread multiprocessor. ICS 2008: 73-82 - [c52]Dean M. Tullsen:
Holistic Design of Multiple-Core Architectures. ISPDC 2008: 8-9 - 2007
- [j19]Rakesh Kumar, Dean M. Tullsen:
The architecture of Efficient Multi-Core Processors: A Holistic Approach. Adv. Comput. 69: 1-87 (2007) - [j18]Dean M. Tullsen, Rakesh Kumar, Norman P. Jouppi:
Introduction to the special issue on the 2006 workshop on design, analysis, and simulation of chip multiprocessors: (dasCMP'06). SIGARCH Comput. Archit. News 35(1): 2 (2007) - [j17]Brad Calder, Dean M. Tullsen:
Introduction. ACM Trans. Archit. Code Optim. 4(1): 1 (2007) - [j16]Ravi R. Iyer, Dean M. Tullsen:
Editorial: Special Section on CMP Architectures. IEEE Trans. Parallel Distributed Syst. 18(8): 1025-1027 (2007) - [c51]Weifeng Zhang, Dean M. Tullsen, Brad Calder:
Accelerating and Adapting Precomputation Threads for Effcient Prefetching. HPCA 2007: 85-95 - [c50]Dean M. Tullsen:
HCW Keynote Address Holistic Design of Multi-Core Architectures. IPDPS 2007: 1 - [c49]Jeffery A. Brown, Rakesh Kumar, Dean M. Tullsen:
Proximity-aware directory-based coherence for multi-core processor architectures. SPAA 2007: 126-134 - [e1]Dean M. Tullsen, Brad Calder:
34th International Symposium on Computer Architecture (ISCA 2007), June 9-13, 2007, San Diego, California, USA. ACM 2007, ISBN 978-1-59593-706-3 [contents] - 2006
- [j15]Brad Calder, Dean M. Tullsen:
Introduction. ACM Trans. Archit. Code Optim. 3(1): 1-2 (2006) - [c48]Rakesh Kumar, Dean M. Tullsen, Norman P. Jouppi:
Core architecture optimization for heterogeneous chip multiprocessors. PACT 2006: 23-32 - [c47]Weifeng Zhang, Brad Calder, Dean M. Tullsen:
A Self-Repairing Prefetcher in an Event-Driven Dynamic Optimization Framework. CGO 2006: 50-64 - [c46]David Sheldon, Rakesh Kumar, Roman L. Lysecky, Frank Vahid, Dean M. Tullsen:
Application-specific customization of parameterized FPGA soft-core processors. ICCAD 2006: 261-268 - [c45]David Sheldon, Rakesh Kumar, Frank Vahid, Dean M. Tullsen, Roman L. Lysecky:
Conjoining soft-core FPGA processors. ICCAD 2006: 694-701 - [c44]Weifeng Zhang, Brad Calder, Dean M. Tullsen, Steve Checkoway:
Speculative Code Value Specialization Using the Trace Cache Fill Unit. ICCD 2006: 10-16 - [c43]Matthew De Vuyst, Rakesh Kumar, Dean M. Tullsen:
Exploiting unbalanced thread scheduling for energy and performance on a CMP of SMT processors. IPDPS 2006 - 2005
- [j14]Yiannakis Sazeides, Rakesh Kumar, Dean M. Tullsen, Theofanis Constantinou:
The Danger of Interval-Based Power Efficiency Metrics: When Worst Is Best. IEEE Comput. Archit. Lett. 4(1): 1 (2005) - [j13]Rakesh Kumar, Dean M. Tullsen, Norman P. Jouppi, Parthasarathy Ranganathan:
Heterogeneous Chip Multiprocessors. Computer 38(11): 32-38 (2005) - [j12]John S. Seng, Dean M. Tullsen:
Architecture-Level Power Optimization - What Are the Limits? J. Instr. Level Parallelism 7 (2005) - [j11]Norman P. Jouppi, Rakesh Kumar, Dean M. Tullsen:
Introduction to the special issue on the 2005 workshop on design, analysis, and simulation of chip multiprocessors (dasCMP'05). SIGARCH Comput. Archit. News 33(4): 4 (2005) - [j10]Brad Calder, Dean M. Tullsen:
Introduction. ACM Trans. Archit. Code Optim. 2(1): 1-2 (2005) - [c42]Weifeng Zhang, Brad Calder, Dean M. Tullsen:
An Event-Driven Multithreaded Dynamic Optimization Framework. IEEE PACT 2005: 87-98 - [c41]Nathan Tuck, Dean M. Tullsen:
Multithreaded Value Prediction. HPCA 2005: 5-15 - [c40]Florin Baboescu, Dean M. Tullsen, Grigore Rosu, Sumeet Singh:
A Tree Based Router Search Engine Architecture with Single Port Memories. ISCA 2005: 123-133 - [c39]Rakesh Kumar, Victor V. Zyuban, Dean M. Tullsen:
Interconnections in Multi-Core Architectures: Understanding Mechanisms, Overheads and Scaling. ISCA 2005: 408-419 - [c38]Carlos García Quiñones, Carlos Madriles, F. Jesús Sánchez, Pedro Marcuello, Antonio González, Dean M. Tullsen:
Mitosis compiler: an infrastructure for speculative threading based on pre-computation slices. PLDI 2005: 269-279 - 2004
- [j9]Brad Calder, Dean M. Tullsen:
Introduction. ACM Trans. Archit. Code Optim. 1(1): 1-2 (2004) - [c37]Jamison D. Collins, Dean M. Tullsen:
Clustered Multithreaded Architectures - Pursuing both IPC and Cycle Time. IPDPS 2004 - [c36]Rakesh Kumar, Dean M. Tullsen, Parthasarathy Ranganathan, Norman P. Jouppi, Keith I. Farkas:
Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance. ISCA 2004: 64-75 - [c35]Jamison D. Collins, Dean M. Tullsen, Hong Wang:
Control Flow Optimization Via Dynamic Reconvergence Prediction. MICRO 2004: 129-140 - [c34]Eric Tune, Rakesh Kumar, Dean M. Tullsen, Brad Calder:
Balanced Multithreading: Increasing Throughput via a Low Cost Multithreading Hierarchy. MICRO 2004: 183-194 - [c33]Rakesh Kumar, Norman P. Jouppi, Dean M. Tullsen:
Conjoined-Core Chip Multiprocessing. MICRO 2004: 195-206 - 2003
- [j8]Rakesh Kumar, Keith I. Farkas, Norman P. Jouppi, Parthasarathy Ranganathan, Dean M. Tullsen:
Processor Power Reduction Via Single-ISA Heterogeneous Multi-Core Architectures. IEEE Comput. Archit. Lett. 2 (2003) - [c32]John S. Seng, Dean M. Tullsen:
The Effect of Compiler Optimizations on Pentium 4 Power Consumption. Interaction between Compilers and Computer Architectures 2003: 51-56 - [c31]Nathan Tuck, Dean M. Tullsen:
Initial Observations of the Simultaneous Multithreading Pentium 4 Processor. IEEE PACT 2003: 26-34 - [c30]Rakesh Kumar, Keith I. Farkas, Norman P. Jouppi, Parthasarathy Ranganathan, Dean M. Tullsen:
Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction. MICRO 2003: 81-92 - [c29]John S. Seng, Dean M. Tullsen:
Exploring the Potential of Architecture-Level Power Optimizations. PACS 2003: 132-147 - 2002
- [c28]Eric Tune, Dean M. Tullsen, Brad Calder:
Quantifying Instruction Criticality. IEEE PACT 2002: 104-113 - [c27]Jamison D. Collins, Suleyman Sair, Brad Calder, Dean M. Tullsen:
Pointer cache assisted prefetching. MICRO 2002: 62-73 - [c26]Rakesh Kumar, Dean M. Tullsen:
Compiling for instruction cache performance on a multithreaded architecture. MICRO 2002: 419-429 - [c25]Allan Snavely, Dean M. Tullsen, Geoffrey M. Voelker:
Symbiotic jobscheduling with priorities for a simultaneous multithreading processor. SIGMETRICS 2002: 66-76 - 2001
- [j7]Jamison D. Collins, Dean M. Tullsen:
Runtime identification of cache conflict misses: The adaptive miss buffer. ACM Trans. Comput. Syst. 19(4): 413-439 (2001) - [c24]Eric Tune, Dongning Liang, Dean M. Tullsen, Brad Calder:
Dynamic Prediction of Critical Path Instructions. HPCA 2001: 185-195 - [c23]Jamison D. Collins, Hong Wang, Dean M. Tullsen, Christopher J. Hughes, Yong-Fong Lee, Daniel M. Lavery, John Paul Shen:
Speculative precomputation: long-range prefetching of delinquent loads. ISCA 2001: 14-25 - [c22]John S. Seng, Eric Tune, Dean M. Tullsen:
Reducing power with dynamic critical path information. MICRO 2001: 114-123 - [c21]Jamison D. Collins, Dean M. Tullsen, Hong Wang, John Paul Shen:
Dynamic speculative precomputation. MICRO 2001: 306-317 - [c20]Dean M. Tullsen, Jeffery A. Brown:
Handling long-latency loads in a simultaneous multithreading processor. MICRO 2001: 318-327 - 2000
- [j6]Barbara Kreaseck, Dean M. Tullsen, Brad Calder:
Limits of task-based parallelism in irregular applications. SIGARCH Comput. Archit. News 28(1): 20 (2000) - [c19]Allan Snavely, Dean M. Tullsen:
Symbiotic Jobscheduling for a Simultaneous Multithreading Processor. ASPLOS 2000: 234-244 - [c18]John S. Seng, Dean M. Tullsen, George Z. N. Cai:
Power-Sensitive Multithreaded Architecture. ICCD 2000: 199-206 - [c17]Barbara Kreaseck, Dean M. Tullsen, Brad Calder:
Limits of Task-Based Parallelism in Irregular Applications. ISHPC 2000: 43-58
1990 – 1999
- 1999
- [j5]Jack L. Lo, Susan J. Eggers, Henry M. Levy, Sujay S. Parekh, Dean M. Tullsen:
Tuning Compiler Optimizations for Simultaneous Multithreading. Int. J. Parallel Program. 27(6): 477-503 (1999) - [j4]Jack L. Lo, Sujay S. Parekh, Susan J. Eggers, Henry M. Levy, Dean M. Tullsen:
Software-Directed Register Deallocation for Simultaneous Multithreaded Processors. IEEE Trans. Parallel Distributed Syst. 10(9): 922-933 (1999) - [c16]Steven Wallace, Dean M. Tullsen, Brad Calder:
Instruction Recycling on a Multiple-Path Processor. HPCA 1999: 44-53 - [c15]Dean M. Tullsen, Jack L. Lo, Susan J. Eggers, Henry M. Levy:
Supporting Fine-Grained Synchronization on a Simultaneous Multithreading Processor. HPCA 1999: 54-58 - [c14]Dean M. Tullsen, Guang R. Gao:
Multithreaded Execution Architecture and Compilation. HPCA 1999: 321 - [c13]Glenn Reinman, Brad Calder, Dean M. Tullsen, Gary S. Tyson, Todd M. Austin:
Classifying load and store instructions for memory renaming. International Conference on Supercomputing 1999: 399-407 - [c12]Brad Calder, Glenn Reinman, Dean M. Tullsen:
Selective Value Prediction. ISCA 1999: 64-74 - [c11]Dean M. Tullsen, John S. Seng:
Storageless Value Prediction Using Prior Register Values. ISCA 1999: 270-279 - [c10]Jamison D. Collins, Dean M. Tullsen:
Hardware Identification of Cache Conflict Misses. MICRO 1999: 126-135 - [c9]Nicholas Mitchell, Larry Carter, Jeanne Ferrante, Dean M. Tullsen:
ILP versus TLP on SMT. SC 1999: 37 - 1998
- [c8]Dean M. Tullsen, Susan J. Eggers, Henry M. Levy:
Retrospective: Simultaneous Multithreading: Maximizing On-Chip Parallelism. 25 Years ISCA: Retrospectives and Reprints 1998: 115-116 - [c7]Steven Wallace, Brad Calder, Dean M. Tullsen:
Threaded Multiple Path Execution. ISCA 1998: 238-249 - [c6]Dean M. Tullsen, Susan J. Eggers, Henry M. Levy:
Simultaneous Multithreading: Maximizing On-Chip Parallelism. 25 Years ISCA: Retrospectives and Reprints 1998: 533-544 - 1997
- [j3]Susan J. Eggers, Joel S. Emer, Henry M. Levy, Jack L. Lo, Rebecca L. Stamm, Dean M. Tullsen:
Simultaneous multithreading: a platform for next-generation processors. IEEE Micro 17(5): 12-19 (1997) - [j2]Jack L. Lo, Susan J. Eggers, Joel S. Emer, Henry M. Levy, Rebecca L. Stamm, Dean M. Tullsen:
Converting Thread-Level Parallelism to Instruction-Level Parallelism via Simultaneous Multithreading. ACM Trans. Comput. Syst. 15(3): 322-354 (1997) - [c5]Jack L. Lo, Susan J. Eggers, Henry M. Levy, Sujay S. Parekh, Dean M. Tullsen:
Tuning Compiler Optimizations for Simultaneous Multithreading. MICRO 1997: 114-124 - 1996
- [b1]Dean M. Tullsen:
Simultaneous multithreading. University of Washington, USA, 1996 - [c4]Dean M. Tullsen:
Fellowship - Simulation And Modeling Of A Simultaneous Multithreading Processor. Int. CMG Conference 1996: 819-828 - [c3]Dean M. Tullsen, Susan J. Eggers, Joel S. Emer, Henry M. Levy, Jack L. Lo, Rebecca L. Stamm:
Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor. ISCA 1996: 191-202 - 1995
- [j1]Dean M. Tullsen, Susan J. Eggers:
Effective Cache Prefetching on Bus-Based Multiprocessors. ACM Trans. Comput. Syst. 13(1): 57-88 (1995) - [c2]Dean M. Tullsen, Susan J. Eggers, Henry M. Levy:
Simultaneous Multithreading: Maximizing On-Chip Parallelism. ISCA 1995: 392-403 - 1993
- [c1]Dean M. Tullsen, Susan J. Eggers:
Limitations of Cache Prefetching on a Bus-Based Multiprocessor. ISCA 1993: 278-288
Coauthor Index
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