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ORCIDIEEE Micro, Volume 32
Volume 32, Number 1, January - February 2012
- Erik R. Altman:
Hot Interconnects and Hot Topics . 2-3
- Torsten Hoefler, Patrick Geoffray, Fabrizio Petrini, Jesper Larsson Träff:
Top Picks from Hot Interconnects 2011: Petascale Network Architectures. 4-7 - Min Xie, Yutong Lu, Kefei Wang, Lu Liu, Hongjia Cao, Xuejun Yang:
Tianhe-1A Interconnect and Message-Passing Services. 8-20 - Yuichiro Ajima, Tomohiro Inoue, Shinya Hiramoto, Yuzo Takagi, Toshiyuki Shimizu:
The Tofu Interconnect. 21-31 - Dong Chen, Noel Eisley, Philip Heidelberger, Robert M. Senger, Yutaka Sugawara, Sameer Kumar, Valentina Salapura, David L. Satterfield, Burkhard D. Steinmacher-Burow, Jeffrey J. Parker:
The IBM Blue Gene/Q Interconnection Fabric. 32-43 - Ismael Gómez Miguelez, Vuk Marojevic, Antoni Gelonch Bosch:
Resource Management for Software-Defined Radio Clouds. 44-53 - Fabrice Harrouet:
Designing a Multicore and Multiprocessor Individual-Based Simulation Engine. 54-65 - Parthasarathy Ranganathan, Jichuan Chang:
(Re)Designing Data-Centric Data Centers. 66-70 - Shane Greenstein:
The Range of Linus' Law. 72
Volume 32, Number 2, March - April 2012
- Erik R. Altman:
Micro Evolution. 2 - Richard H. Stern:
Standardization Skullduggery Never Ends: Apple v. Motorola. 3-5 - Allen Baum, Bevan Bass:
Hot Chips 23. 6-7 - Manish Shah, Robert T. Golla, Greg Grohoski, Paul J. Jordan, Jama Barreh, Jeffrey Brooks, Mark Greenberg, Gideon Levinsky, Mark Luttrell, Christopher Olson, Zeid Samoail, Matt Smittle, Thomas A. Ziaja:
Sparc T4: A Dynamically Threaded Server-on-a-Chip. 8-19 - Efraim Rotem, Alon Naveh, Avinash Ananthakrishnan, Eliezer Weissmann, Doron Rajwan:
Power-Management Architecture of the Intel Microarchitecture Code-Named Sandy Bridge. 20-27 - Alexander Branover, Denis Foley, Maurice Steinman:
AMD Fusion APU: Llano. 28-37 - Dongrui Fan, Hao Zhang, Da Wang, Xiaochun Ye, Fenglong Song, Guojie Li, Ninghui Sun:
Godson-T: An Efficient Many-Core Processor Exploring Thread-Level Parallelism. 38-47 - Ruud A. Haring, Martin Ohmacht, Thomas W. Fox, Michael Gschwind, David L. Satterfield, Krishnan Sugavanam, Paul Coteus, Philip Heidelberger, Matthias A. Blumrich, Robert W. Wisniewski, Alan Gara, George L.-T. Chiu, Peter A. Boyle, Norman H. Christ, Changhoan Kim:
The IBM Blue Gene/Q Compute Chip. 48-60 - Richard Mateosian:
Miscellany. 61-63 - Shane Greenstein:
A Big Payoff. 64
Volume 32, Number 3, May - June 2012
- Erik R. Altman:
Top Picks, Columnists, and Artists. 2 - Paolo Faraboschi
, T. N. Vijaykumar:
Top Picks from the 2011 Computer Architecture Conferences. 3-6 - Wilson Wai Lun Fung, Inderpreet Singh, Andrew Brownsword, Tor M. Aamodt:
Kilo TM: Hardware Transactional Memory for GPU Architectures. 7-16 - Boris Grot, Joel Hestness, Stephen W. Keckler, Onur Mutlu:
A QoS-Enabled On-Die Interconnect Fabric for Kilo-Node Chips. 17-25 - Daniel Sánchez, Christos Kozyrakis:
Scalable and Efficient Fine-Grained Cache Partitioning with Vantage. 26-37 - Hung-Wei Tseng, Dean M. Tullsen:
Eliminating Redundant Computation and Exposing Parallelism through Data-Triggered Threads. 38-47 - Niket Kumar Choudhary, Salil V. Wadhavkar, Tanmay A. Shah, Hiran Mayukh, Jayneel Gandhi, Brandon H. Dwiel, Sandeep Navada, Hashem Hashemi Najaf-abadi, Eric Rotenberg:
FabScalar: Automating Superscalar Core Design. 48-59 - Qingyuan Deng, Luiz E. Ramos, Ricardo Bianchini, David Meisner, Thomas F. Wenisch:
Active Low-Power Modes for Main Memory with MemScale. 60-69 - Gabriel H. Loh, Mark D. Hill:
Supporting Very Large DRAM Caches with Compound-Access Scheduling and MissMap. 70-78 - Doe Hyun Yoon, Naveen Muralimanohar, Jichuan Chang, Parthasarathy Ranganathan, Norman P. Jouppi, Mattan Erez:
Free-p: A Practical End-to-End Nonvolatile Memory Protection Mechanism. 79-87 - Jason Mars, Lingjia Tang, Kevin Skadron, Mary Lou Soffa, Robert Hundt:
Increasing Utilization in Modern Warehouse-Scale Computers Using Bubble-Up. 88-99 - Nathan L. Binkert, Al Davis, Norman P. Jouppi, Moray McLaren, Naveen Muralimanohar, Robert Schreiber, Jung Ho Ahn:
Optical High Radix Switch Design. 100-109 - Hadi Esmaeilzadeh, Ting Cao, Xi Yang, Stephen Blackburn, Kathryn S. McKinley:
What is Happening to Power, Performance, and Software? 110-121 - Hadi Esmaeilzadeh, Emily R. Blem, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger:
Dark Silicon and the End of Multicore Scaling. 122-134 - Michael C. Doggett:
Texture Caches. 136-141 - Shane Greenstein:
The Secret Life of Wally Madhavani. 142-143
Volume 32, Number 4, July - August 2012
- Erik R. Altman:
The Odd Couple: Hardware and Software. 2 - Doug Burger, Stephen W. Keckler, Mark Papermaster:
Charles R. (Chuck) Moore (1961 - 2012). 3-5 - David I. August:
Parallelizing Sequential Code. 6-7 - Simone Campanoni, Timothy M. Jones, Glenn H. Holloway, Gu-Yeon Wei, David M. Brooks:
Helix: Making the Extraction of Thread-Level Parallelism Mainstream. 8-18 - Feng Li, Antoniu Pop, Albert Cohen:
Automatic Extraction of Coarse-Grained Data-Flow Threads from Imperative Programs. 19-31 - Md. Kamruzzaman, Steven Swanson, Dean M. Tullsen:
Underclocked Software Prefetching: More Cores, Less Energy. 32-41 - Saturnino Garcia, Donghwan Jeon, Christopher M. Louie, Michael Bedford Taylor:
The Kremlin Oracle for Sequential Code Parallelization. 42-53 - Hengjie Li, Wenting He, Yang Chen, Lieven Eeckhout, Olivier Temam, Chengyong Wu:
SWAP: Parallelization through Algorithm Substitution. 54-67 - Rich Belgard:
Yale N. Patt Receives the Inaugural IEEE B. Ramakrishna Rau Award. 68-69 - Shane Greenstein:
Calm Economics. 72
Volume 32, Number 5, September - October 2012
- Erik R. Altman:
Power- and Energy-Aware Computing. 2 - Josep Torrellas:
2012 International Symposium on Computer Architecture Influential Paper Award. 4-5 - Thomas F. Wenisch, Alper Buyuktosunoglu:
Energy-Aware Computing. 6-8 - Vibhu Sharma, Stefan Cosemans, Maryam Ashouei, Jos Huisken, Francky Catthoor, Wim Dehaene:
Ultra Low-Energy SRAM Design for Smart Ubiquitous Sensors. 10-24 - David Burgess, Edmund Gieske, James Holt, Thomas Hoy, Gary Whisenhunt:
e6500: Freescale's Low-Power, High-Performance Multithreaded Embedded Processor. 26-36 - Venkatraman Govindaraju, Chen-Han Ho, Tony Nowatzki, Jatin Chhugani, Nadathur Satish, Karthikeyan Sankaralingam, Changkyu Kim:
DySER: Unifying Functionality and Parallelism Specialization for Energy-Efficient Computing. 38-51 - Boris Grot, Damien Hardy, Pejman Lotfi-Kamran, Babak Falsafi, Chrysostomos Nicopoulos, Yiannakis Sazeides:
Optimizing Data-Center TCO with Scale-Out Processors. 52-63 - Sherief Reda, Ryan Cochran, Ayse K. Coskun:
Adaptive Power Capping for Servers with Multithreaded Workloads. 64-75 - Richard Mateosian:
Forewords by Celebrities. 76-77 - Shane Greenstein:
The Prevailing View. 80
Volume 32, Number 6, 2012
- Manish Arora, Siddhartha Nath, Subhra Mazumdar, Scott B. Baden, Dean M. Tullsen:
Redefining the Role of the CPU in the Era of CPU-GPU Integration. 4-16 - Javier Verdú, Alex Pajuelo, Mateo Valero:
The Problem of Evaluating CPU-GPU Systems with 3D Visualization Applications. 17-27 - David May:
The XMOS Architecture and XS1 Chips. 28-37 - Jinwook Oh, Gyeonghoon Kim, Injoon Hong, Junyoung Park, Seungjin Lee, Joo-Young Kim, Jeong-Ho Woo, Hoi-Jun Yoo:
Low-Power, Real-Time Object-Recognition Processors for Mobile Vision Systems. 38-50 - Kazutoshi Suito, Rikuhei Ueda, Kei Fujii, Takuma Kogo, Hiroki Matsutani, Nobuyuki Yamasaki:
The Dependable Responsive Multithreaded Processor for Distributed Real-Time Systems. 52-61
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