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Sudhakar M. Reddy
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Publications
- 2008
- [c331]Irith Pomeranz, Sudhakar M. Reddy, Sandip Kundu:
On Common-Mode Skewed-Load and Broadside Tests. VLSI Design 2008: 151-156 - 2005
- [c275]Bharath Seshadri, Irith Pomeranz, Sudhakar M. Reddy, Sandip Kundu:
Path-oriented transition fault test generation considering operating conditions. ETS 2005: 54-59 - 2004
- [j143]Irith Pomeranz, Sandip Kundu, Sudhakar M. Reddy:
Masking of Unknown Output Values during Output Response Compression byUsing Comparison Units. IEEE Trans. Computers 53(1): 83-88 (2004) - [j138]Irith Pomeranz, Sudhakar M. Reddy, Sandip Kundu:
On the characterization and efficient computation of hard-to-detect bridging faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(12): 1640-1649 (2004) - 2003
- [c238]Irith Pomeranz, Sudhakar M. Reddy, Sandip Kundu:
On the Characterization of Hard-to-Detect Bridging Faults. DATE 2003: 11012-11019 - [c235]Bharath Seshadri, Irith Pomeranz, Sudhakar M. Reddy, Sandip Kundu:
On path selection for delay fault testing considering operating conditions [logic IC testing]. ETW 2003: 141-146 - [c226]Masao Naruse, Irith Pomeranz, Sudhakar M. Reddy, Sandip Kundu:
On-chip Compression of Output Responses with Unknown Values Using LFSR Reseeding. ITC 2003: 1060-1068 - 2002
- [c211]Irith Pomeranz, Sandip Kundu, Sudhakar M. Reddy:
On output response compression in the presence of unknown output values. DAC 2002: 255-258 - 1991
- [j61]Sandip Kundu, Sudhakar M. Reddy, Niraj K. Jha:
Design of robustly testable combinational logic circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(8): 1036-1048 (1991) - 1990
- [j60]Sandip Kundu, Sudhakar M. Reddy:
Embedded Totally Self-Checking Checkers: A Practical Design. IEEE Des. Test Comput. 7(4): 5-12 (1990) - [j59]Sandip Kundu, Sudhakar M. Reddy:
Robust tests for parity trees. J. Electron. Test. 1(3): 191-200 (1990) - [j58]Sandip Kundu, Sudhakar M. Reddy:
On Symmetric Error Correcting and All Unidirectional Error Detecting Codes. IEEE Trans. Computers 39(6): 752-761 (1990) - 1989
- [c20]Sandip Kundu, Sudhakar M. Reddy:
Design of TSC checkers for implementation in CMOS technology. ICCD 1989: 116-119 - 1988
- [c18]Sandip Kundu, Sudhakar M. Reddy:
On the design of robust testable CMOS combinational logic circuits. FTCS 1988: 220-225 - [c17]Sandip Kundu, Sudhakar M. Reddy, Niraj K. Jha:
On the design of robust multiple fault testable CMOS combinational logic circuits. ICCAD 1988: 240-243 - [c16]Sandip Kundu, Sudhakar M. Reddy:
Robust Tests for Parity Trees. ITC 1988: 680-687

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