default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDCsaba Andras Moritz
Person information
- affiliation: University of Massachusetts Amherst, USA
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
Journal Articles
- 2023
[j26]Sachin Bhat
, Mingyu Li, Sourabh Kulkarni, Csaba Andras Moritz:
SkyBridge 2.0: A Fine-grained Vertical 3D-IC Technology for Future ICs. ACM J. Emerg. Technol. Comput. Syst. 19(4): 33:1-33:19 (2023)- [j25]Sourabh Kulkarni, Csaba Andras Moritz:
Improving Effectiveness of Simulation-Based Inference in the Massively Parallel Regime. IEEE Trans. Parallel Distributed Syst. 34(4): 1100-1114 (2023) - 2022
- [j24]Sourabh Kulkarni, Mario Michael Krell, Seth Nabarro, Csaba Andras Moritz:
Hardware-accelerated Simulation-based Inference of Stochastic Epidemiology Models for COVID-19. ACM J. Emerg. Technol. Comput. Syst. 18(2): 30:1-30:24 (2022) - [j23]Nihat Akkan, Serzat Safaltin, Levent Aksoy, Ismail Cevik, Herman Sedef, Csaba Andras Moritz, Mustafa Altun:
Technology Development and Modeling of Switching Lattices Using Square and H Shaped Four-Terminal Switches. IEEE Trans. Emerg. Top. Comput. 10(1): 351-360 (2022) - 2021
- [j22]Sourabh Kulkarni, Sachin Bhat, Csaba Andras Moritz:
Architecting for Artificial Intelligence with Emerging Nanotechnology. ACM J. Emerg. Technol. Comput. Syst. 17(3): 26:1-26:33 (2021) - 2017
- [j21]Jiajun Shi, Mingyu Li, Mostafizur Rahman, Santosh Khasanvis, Csaba Andras Moritz:
NP-Dynamic Skybridge: A Fine-Grained 3D IC Technology with NP-Dynamic Logic. IEEE Trans. Emerg. Top. Comput. 5(2): 286-299 (2017) - 2015
- [j20]Santosh Khasanvis, Mingyu Li, Mostafizur Rahman, Ayan Kumar Biswas, Mohammad Salehi Fashami, Jayasimha Atulasimha, Supriyo Bandyopadhyay, Csaba Andras Moritz:
Architecting for Causal Intelligence at Nanoscale. Computer 48(12): 54-64 (2015) - [j19]Santosh Khasanvis, K. M. Masum Habib, Mostafizur Rahman, Roger K. Lake, Csaba Andras Moritz:
Low-Power Heterogeneous Graphene Nanoribbon-CMOS Multistate Volatile Memory Circuit. ACM J. Emerg. Technol. Comput. Syst. 12(2): 15:1-15:18 (2015) - [j18]Mostafizur Rahman, Santosh Khasanvis, Csaba Andras Moritz:
Nanowire Volatile RAM as an Alternative to SRAM. ACM J. Emerg. Technol. Comput. Syst. 12(3): 30:1-30:13 (2015) - [j17]Csaba Andras Moritz:
Welcome Message. IEEE Trans. Multi Scale Comput. Syst. 1(1): 1 (2015) - 2014
- [j16]Csaba Andras Moritz, Santosh Khasanvis, Pritish Narayanan:
Introduction to JPDC special issue on computing with future nanotechnology. J. Parallel Distributed Comput. 74(6): 2439-2440 (2014) - [j15]Santosh Khasanvis, Mostafizur Rahman, Csaba Andras Moritz:
Heterogeneous graphene-CMOS ternary content addressable memory. J. Parallel Distributed Comput. 74(6): 2497-2503 (2014) - [j14]Jianfeng Zhang, Mostafizur Rahman, Pritish Narayanan, Santosh Khasanvis, Csaba Andras Moritz:
Parameter variation sensing and estimation in nanoscale fabrics. J. Parallel Distributed Comput. 74(6): 2504-2511 (2014) - 2013
- [j13]Pritish Narayanan, Michael Leuchtenburg, Jorge Kina, Prachi Joshi, Pavan Panchapakeshan, Chi On Chui, Csaba Andras Moritz:
Variability in Nanoscale Fabrics: Bottom-up Integrated Analysis and Mitigation. ACM J. Emerg. Technol. Comput. Syst. 9(1): 8:1-8:24 (2013) - 2011
- [j12]Yao Guo, Pritish Narayanan, Mahmoud A. Bennaser, Saurabh Chheda, Csaba Andras Moritz:
Energy-Efficient Hardware Data Prefetching. IEEE Trans. Very Large Scale Integr. Syst. 19(2): 250-263 (2011) - 2010
- [j11]Pritish Narayanan, Teng Wang, Csaba Andras Moritz:
Programmable cellular architectures at the nanoscale. Nano Commun. Networks 1(2): 77-85 (2010) - 2009
- [j10]Catherine Dezan, Ciprian Teodorov, Loïc Lagadec, Michael Leuchtenburg, Teng Wang, Pritish Narayanan, Csaba Andras Moritz:
Towards a framework for designing applications onto hybrid nano/CMOS fabrics. Microelectron. J. 40(4-5): 656-664 (2009) - 2008
- [j9]Yao Guo, Vladimir Vlassov, Raksit Ashok, Richard Weiss, Csaba Andras Moritz:
Synchronization coherence: A transparent hardware mechanism for cache coherence and fine-grained synchronization. J. Parallel Distributed Comput. 68(2): 165-181 (2008) - [j8]Mahmoud A. Bennaser, Yao Guo, Csaba Andras Moritz:
Data Memory Subsystem Resilient to Process Variations. IEEE Trans. Very Large Scale Integr. Syst. 16(12): 1631-1638 (2008) - 2007
- [j7]Csaba Andras Moritz, Teng Wang, Pritish Narayanan, Michael Leuchtenburg, Yao Guo, Catherine Dezan, Mahmoud A. Bennaser:
Fault-Tolerant Nanoscale Processors on Semiconductor Nanowire Grids. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(11): 2422-2437 (2007) - 2004
- [j6]Raksit Ashok, Saurabh Chheda, Csaba Andras Moritz:
Coupling compiler-enabled and conventional memory accessing for energy efficiency. ACM Trans. Comput. Syst. 22(2): 180-213 (2004) - 2003
- [j5]Osman S. Unsal, Raksit Ashok, Israel Koren, C. Mani Krishna, Csaba Andras Moritz:
Cool-Cache: A compiler-enabled energy efficient data caching framework for embedded/multimedia processors. ACM Trans. Embed. Comput. Syst. 2(3): 373-392 (2003) - 2002
- [j4]Osman S. Unsal, Israel Koren, C. Mani Krishna, Csaba Andras Moritz:
Cool-Fetch: Compiler-Enabled Power-Aware Fetch Throttling. IEEE Comput. Archit. Lett. 1 (2002) - 2001
- [j3]Khalid Al-Tawil, Csaba Andras Moritz:
Performance Modeling and Evaluation of MPI. J. Parallel Distributed Comput. 61(2): 202-223 (2001) - [j2]Csaba Andras Moritz, Matthew I. Frank:
LoGPC: Modeling Network Contention in Message-Passing Programs. IEEE Trans. Parallel Distributed Syst. 12(4): 404-415 (2001) - [j1]Csaba Andras Moritz, Donald Yeung, Anant Agarwal:
SimpleFit: A Framework for Analyzing Design Trade-Offs in Raw Architectures. IEEE Trans. Parallel Distributed Syst. 12(7): 730-742 (2001)
Conference and Workshop Papers
- 2023
- [c65]Sachin Bhat, Sourabh Kulkarni, Csaba Andras Moritz:
Compact Model Parameter Extraction using Bayesian Machine Learning. ISVLSI 2023: 1-6 - 2021
- [c64]Sachin Bhat, Sounak Shaun Ghosh, Sourabh Kulkarni, Mingyu Li, Csaba Andras Moritz:
A Wafer-scale Manufacturing Pathway for Fine-grained Vertical 3D-IC Technology. ISQED 2021: 228-233 - [c63]Sachin Bhat, Mingyu Li, Sounak Shaun Ghosh, Sourabh Kulkarni, Csaba Andras Moritz:
SkyBridge-3D-CMOS 2.0: IC Technology for Stacked-Transistor 3D ICs beyond FinFETs. ISVLSI 2021: 176-181 - 2020
- [c62]Mustafa Altun, Ismail Cevik, Ahmet Erten, Osman Eksik, Mircea Stan, Csaba Andras Moritz:
Nano-Crossbar based Computing: Lessons Learned and Future Directions. DATE 2020: 382-387 - [c61]Sourabh Kulkarni, Alexander Tsyplikhin, Mario Michael Krell, Csaba Andras Moritz:
Accelerating Simulation-based Inference with Emerging AI Hardware. ICRC 2020: 126-132 - 2019
- [c60]Serzat Safaltin, Oguz Gencer, Muhammed Ceylan Morgül, Levent Aksoy, Sebahattin Gurmen, Csaba Andras Moritz, Mustafa Altun:
Realization of Four-Terminal Switching Lattices: Technology Development and Circuit Modeling. DATE 2019: 504-509 - [c59]Sourabh Kulkarni, Sachin Bhat, Csaba Andras Moritz:
Reconfigurable Probabilistic AI Architecture for Personalized Cancer Treatment. ICRC 2019: 1-7 - 2018
- [c58]Muhammed Ceylan Morgül, Onur Tunali, Mustafa Altun, Luca Frontini, Valentina Ciriani, Elena-Ioana Vatajelu, Lorena Anghel, Csaba Andras Moritz, Mircea R. Stan, Dan Alexandrescu:
Integrated Synthesis Methodology for Crossbar Arrays. NANOARCH 2018: 91-97 - 2017
- [c57]Sourabh Kulkarni, Sachin Bhat, Santosh Khasanvis, Csaba Andras Moritz:
Magneto-Electric Approximate Computational Circuits for Bayesian Inference. ICRC 2017: 1-8 - [c56]Sourabh Kulkarni, Sachin Bhat, Csaba Andras Moritz:
Structure Discovery for Gene Expression Networks with Emerging Stochastic Hardware. ICRC 2017: 1-4 - [c55]Jiajun Shi, Mingyu Li, Csaba Andras Moritz:
Power-delivery network in 3D ICs: Monolithic 3D vs. Skybridge 3D CMOS. NANOARCH 2017: 73-78 - [c54]Mingyu Li, Jiajun Shi, Sachin Bhat, Csaba Andras Moritz:
Fine-grained 3D reconfigurable computing fabric with RRAM. NANOARCH 2017: 79-80 - [c53]Sachin Bhat, Sourabh Kulkami, Jiajun Shi, Mingyu Li, Csaba Andras Moritz:
SkyNet: Memristor-based 3D IC for artificial neural networks. NANOARCH 2017: 109-114 - 2016
- [c52]Mingyu Li, Jiajun Shi, Mostafizur Rahman, Santosh Khasanvis, Sachin Bhat, Csaba Andras Moritz:
Skybridge-3D-CMOS: A Vertically-Composed Fine-Grained 3D CMOS Integrated Circuit Technology. ISVLSI 2016: 403-408 - [c51]Jiajun Shi, Deepak Nayak, Motoi Ichihashi, Srinivasa Banna, Csaba Andras Moritz:
On the Design of Ultra-High Density 14nm Finfet Based Transistor-Level Monolithic 3D ICs. ISVLSI 2016: 449-454 - [c50]Mingyu Li, Santosh Khasanvis, Jiajun Shi, Sachin Bhat, Mostafizur Rahman, Csaba Andras Moritz:
Towards automatic thermal network extraction in 3D ICs. NANOARCH 2016: 25-30 - [c49]Jiajun Shi, Mingyu Li, Santosh Khasanvis, Mostafizur Rahman, Csaba Andras Moritz:
Routability in 3D IC design: Monolithic 3D vs. Skybridge 3D CMOS. NANOARCH 2016: 145-150 - 2015
- [c48]Mostafizur Rahman, Santosh Khasanvis, Jiajun Shi, Mingyu Li, Csaba Andras Moritz:
Fine-grained 3-D integrated circuit fabric using vertical nanowires. 3DIC 2015: TS9.3.1-TS9.3.7 - [c47]Santosh Khasanvis, Mingyu Li, Mostafizur Rahman, Mohammad Salehi Fashami, Ayan Kumar Biswas, Jayasimha Atulasimha, Supriyo Bandyopadhyay, Csaba Andras Moritz:
Physically equivalent magneto-electric nanoarchitecture for probabilistic reasoning. NANOARCH 2015: 25-26 - [c46]Mostafizur Rahman, Santosh Khasanvis, Jiajun Shi, Mingyu Li, Csaba Andras Moritz:
Architecting 3-D integrated circuit fabric with intrinsic thermal management features. NANOARCH 2015: 157-162 - [c45]Jiajun Shi, Mingyu Li, Mostafizur Rahman, Santosh Khasanvis, Csaba Andras Moritz:
Architecting NP-Dynamic Skybridge. NANOARCH 2015: 169-174 - [c44]Santosh Khasanvis, Mostafizur Rahman, Mingyu Li, Jiajun Shi, Csaba Andras Moritz:
Architecting connectivity for fine-grained 3-D vertically integrated circuits. NANOARCH 2015: 175-180 - 2014
- [c43]Mostafizur Rahman, Mingyu Li, Jiajun Shi, Santosh Khasanvis, Csaba Andras Moritz:
A new Tunnel-FET based RAM concept for ultra-low power applications. NANOARCH 2014: 57-58 - [c42]Santosh Khasanvis, Mostafizur Rahman, Sankara Narayanan Rajapandian, Csaba Andras Moritz:
Wave-based multi-valued computation framework. NANOARCH 2014: 171-176 - 2013
- [c41]Santosh Khasanvis, Mostafizur Rahman, Prasad Shabadi, Pritish Narayanan, Hyung Suk Yu, Chi On Chui, Csaba Andras Moritz:
Nanowire field-programmable computing platform. NANOARCH 2013: 23-25 - [c40]Santosh Khasanvis, Sankara Narayanan Rajapandian, Prasad Shabadi, Jiajun Shi, Csaba Andras Moritz:
Embedded processors based on Spin Wave Functions (SPWFs). NANOARCH 2013: 32-33 - [c39]Mostafizur Rahman, Pritish Narayanan, Santosh Khasanvis, John Nicholson, Csaba Andras Moritz:
Experimental prototyping of beyond-CMOS nanowire computing fabrics. NANOARCH 2013: 134-139 - [c38]Vikram B. Suresh, Akshaya Shanmugam, Lekshmi Krishnan, Avinash Bijjal, Mostafizur Rahman, Csaba Andras Moritz:
Design of 8T-nanowire RAM array. NANOARCH 2013: 152-157 - 2012
- [c37]Santosh Khasanvis, K. M. Masum Habib, Mostafizur Rahman, Pritish Narayanan, Roger K. Lake, Csaba Andras Moritz:
Ternary volatile random access memory based on heterogeneous graphene-CMOS fabric. NANOARCH 2012: 69-76 - [c36]J. G. Alzate, Parag Upadhyaya, M. Lewis, J. Nath, Y. T. Lin, Kin Wong, S. Cherepov, P. Khalili Amiri, Kang L. Wang, J. Hockel, A. Bur, Gregory P. Carman, S. Bender, Y. Tserkovnyak, J. Zhu, Y.-J. Chen, I. N. Krivorotov, J. Katine, J. Langer, Prasad Shabadi, Santosh Khasanvis, Sankara Narayanan Rajapandian, Csaba Andras Moritz, Alexander Khitun:
Spin wave nanofabric update. NANOARCH 2012: 196-202 - 2011
- [c35]Md. Muwyid U. Khan, Pritish Narayanan, Priyamvada Vijayakumar, Israel Koren, C. Mani Krishna, Csaba Andras Moritz:
Biased Voting for Improved Yield in Nanoscale Fabrics. DFT 2011: 79-85 - [c34]Pritish Narayanan, Jorge Kina, Pavan Panchapakeshan, Priyamvada Vijayakumar, Kyeong-Sik Shin, Mostafizur Rahman, Michael Leuchtenburg, Israel Koren, Chi On Chui, Csaba Andras Moritz:
Nanoscale Application Specific Integrated Circuits. NANOARCH 2011: 99-106 - [c33]Prasad Shabadi, Alexander Khitun, Kin Wong, P. Khalili Amiri, Kang L. Wang, Csaba Andras Moritz:
Spin wave functions nanofabric update. NANOARCH 2011: 107-113 - [c32]Priyamvada Vijayakumar, Pritish Narayanan, Israel Koren, C. Mani Krishna, Csaba Andras Moritz:
Impact of nanomanufacturing flow on systematic yield losses in nanoscale fabrics. NANOARCH 2011: 181-188 - [c31]Santosh Khasanvis, K. M. Masum Habib, Mostafizur Rahman, Pritish Narayanan, Roger K. Lake, Csaba Andras Moritz:
Hybrid Graphene Nanoribbon-CMOS tunneling volatile memory fabric. NANOARCH 2011: 189-195 - [c30]Pavan Panchapakeshan, Pritish Narayanan, Csaba Andras Moritz:
N3ASICs: Designing nanofabrics with fine-grained CMOS integration. NANOARCH 2011: 196-202 - [c29]Adrien Le Masle, Wayne Luk, Csaba Andras Moritz:
Parametrized hardware architectures for the Lucas primality test. ICSAMOS 2011: 124-131 - 2010
- [c28]Pritish Narayanan, Michael Leuchtenburg, Jorge Kina, Prachi Joshi, Pavan Panchapakeshan, Chi On Chui, Csaba Andras Moritz:
Parameter Variability in Nanoscale Fabrics: Bottom-Up Integrated Exploration. DFT 2010: 24-31 - [c27]Priyamvada Vijayakumar, Pritish Narayanan, Israel Koren, C. Mani Krishna, Csaba Andras Moritz:
Incorporating Heterogeneous Redundancy in a Nanoprocessor for Improved Yield and Performance. DFT 2010: 273-279 - [c26]Prasad Shabadi, Alexander Khitun, Pritish Narayanan, Mingqiang Bao, Israel Koren, Kang L. Wang, Csaba Andras Moritz:
Towards logic functions as the device. NANOARCH 2010: 11-16 - 2009
- [c25]Pritish Narayanan, Csaba Andras Moritz, Kyoung-won Park, Chi On Chui:
Validating cascading of crossbar circuits with an integrated device-circuit exploration. NANOARCH 2009: 37-42 - 2008
- [c24]Pritish Narayanan, Michael Leuchtenburg, Teng Wang, Csaba Andras Moritz:
CMOS Control Enabled Single-Type FET NASIC. ISVLSI 2008: 191-196 - [c23]Michael Leuchtenburg, Pritish Narayanan, Teng Wang, Csaba Andras Moritz:
Impact of Process Variation in Fault-Resilient Streaming Nanoprocessors. NanoNet 2008: 26-27 - [c22]Mahmoud Ben Naser, Csaba Andras Moritz:
Power and performance tradeoffs with process variation resilient adaptive cache architectures. SBCCI 2008: 123-128 - 2007
- [c21]Mahmoud Ben Naser, Yao Guo, Csaba Andras Moritz:
Designing Memory Subsystems Resilient to Process Variations. ISVLSI 2007: 357-363 - [c20]Teng Wang, Pritish Narayanan, Csaba Andras Moritz:
Combining 2-level logic families in grid-based nanoscale fabrics. NANOARCH 2007: 101-108 - [c19]Vladimir Vlassov, Oscar Sierra Merino, Csaba Andras Moritz, Konstantin Popov:
Support for Fine-Grained Synchronization in Shared-Memory Multiprocessors. PaCT 2007: 453-467 - 2006
- [c18]Mahmoud Ben Naser, Csaba Andras Moritz:
Power and Failure Analysis of CAM Cells Due to Process Variations. ICECS 2006: 608-611 - 2005
- [c17]Yao Guo, Mahmoud Ben Naser, Csaba Andras Moritz:
PARE: a power-aware hardware data prefetching engine. ISLPED 2005: 339-344 - 2004
- [c16]Osman S. Unsal, Israel Koren, C. Mani Krishna, Csaba Andras Moritz:
Cool-Fetch: A Compiler-Enabled IPC Estimation Based Framework for Energy Reduction. Interaction between Compilers and Computer Architectures 2004: 43-52 - [c15]Saurabh Chheda, Osman S. Unsal, Israel Koren, C. Mani Krishna, Csaba Andras Moritz:
Combining compiler and runtime IPC predictions to reduce energy in next generation architectures. Conf. Computing Frontiers 2004: 240-254 - [c14]Teng Wang, Zhenghua Qi, Csaba Andras Moritz:
Opportunities and challenges in application-tuned circuits and architectures based on nanodevices. Conf. Computing Frontiers 2004: 503-511 - [c13]Yao Guo, Saurabh Chheda, Israel Koren, C. Mani Krishna, Csaba Andras Moritz:
Energy Characterization of Hardware-Based Data Prefetching. ICCD 2004: 518-523 - [c12]Yao Guo, Saurabh Chheda, Israel Koren, C. Mani Krishna, Csaba Andras Moritz:
Energy-Aware Data Prefetching for General-Purpose Programs. PACS 2004: 78-94 - 2003
- [c11]Yao Guo, Saurabh Chheda, Csaba Andras Moritz:
Runtime Biased Pointer Reuse Analysis and Its Application to Energy Efficiency. PACS 2003: 1-12 - 2002
- [c10]Raksit Ashok, Saurabh Chheda, Csaba Andras Moritz:
Cool-Mem: combining statically speculative memory accessing with selective address translation for energy efficiency. ASPLOS 2002: 133-143 - [c9]Osman S. Unsal, Israel Koren, C. Mani Krishna, Csaba Andras Moritz:
The Minimax Cache: An Energy-Efficient Framework for Media Processors. HPCA 2002: 131-140 - 2001
- [c8]Osman S. Unsal, Raksit Ashok, Israel Koren, C. Mani Krishna, Csaba Andras Moritz:
Cool-cache for hot multimedia. MICRO 2001: 274-283 - 2000
- [c7]Csaba Andras Moritz, Matthew I. Frank, Saman P. Amarasinghe:
FlexCache: A Framework for Flexible Compiler Generated Data Caching. Intelligent Memory Systems 2000: 135-146 - 1999
- [c6]Jonathan Babb, Martin C. Rinard, Csaba Andras Moritz, Walter Lee, Matthew I. Frank, Rajeev Barua, Saman P. Amarasinghe:
Parallelizing Applications into Silicon. FCCM 1999: 70- - 1998
- [c5]Csaba Andras Moritz:
The effects of pipelined communication in message-passing. CATA 1998: 401-406 - [c4]Csaba Andras Moritz, Donald Yeung, Anant Agarwal:
Exploring Optimal Cost-Performance Designs for Raw Microprocessors. FCCM 1998: 12-27 - [c3]Khalid Al-Tawil, Csaba Andras Moritz:
LogGP Quantified: The Case for MPI. HPDC 1998: 366-367 - [c2]Csaba Andras Moritz, Matthew I. Frank:
LoGPC: Modeling Network Contention in Message-Passing Programs. SIGMETRICS 1998: 254-263 - 1997
- [c1]Csaba Andras Moritz, Lars-Erik Thorelli:
A static mapping system for logically shared memory parallel programs. PDP 1997: 265-272
Editorship
- 2014
- [e2]Jacques-Olivier Klein, Csaba Andras Moritz, Sorin Cotofana:
IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2014, Paris, France, July 8-10, 2014. IEEE Computer Society/ACM 2014, ISBN 978-1-4799-6383-6 [contents] - 2012
- [e1]Csaba Andras Moritz:
Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2012, Amsterdam, The Netherlands, July 4-6, 2012. ACM 2012, ISBN 978-1-4503-1671-2 [contents]
Informal and Other Publications
- 2021
- [i9]Sourabh Kulkarni, Csaba Andras Moritz:
Efficient State-space Exploration in Massively Parallel Simulation Based Inference. CoRR abs/2106.15508 (2021) - 2020
- [i8]Sourabh Kulkarni, Mario Michael Krell, Seth Nabarro, Csaba Andras Moritz:
Hardware-accelerated Simulation-based Inference of Stochastic Epidemiology Models for COVID-19. CoRR abs/2012.14332 (2020) - 2016
- [i7]Mingyu Li, Jiajun Shi, Mostafizur Rahman, Santosh Khasanvis, Sachin Bhat, Csaba Andras Moritz:
Skybridge-3D-CMOS: A Vertically-Composed Fine-Grained 3D CMOS Integrated Circuit Technology. CoRR abs/1604.08926 (2016) - [i6]Jiajun Shi, Mingyu Li, Santosh Khasanvis, Mostafizur Rahman, Csaba Andras Moritz:
Routability in 3D IC Design: Monolithic 3D vs. Skybridge 3D CMOS. CoRR abs/1605.00045 (2016) - 2015
- [i5]Santosh Khasanvis, Mingyu Li, Mostafizur Rahman, Mohammad Salehi Fashami, Ayan Kumar Biswas, Jayasimha Atulasimha, Supriyo Bandyopadhyay, Csaba Andras Moritz:
Self-similar Magneto-electric Nanocircuit Technology for Probabilistic Inference Engines. CoRR abs/1504.04056 (2015) - [i4]Mostafizur Rahman, Jiajun Shi, Mingyu Li, Santosh Khasanvis, Csaba Andras Moritz:
Manufacturing Pathway and Experimental Demonstration for Nanoscale Fine-Grained 3-D Integrated Circuit Fabric. CoRR abs/1506.00286 (2015) - 2014
- [i3]Mostafizur Rahman, Pritish Narayanan, Csaba Andras Moritz:
Metal-Gated Junctionless Nanowire Transistors. CoRR abs/1404.0296 (2014) - [i2]Mostafizur Rahman, Santosh Khasanvis, Jiajun Shi, Mingyu Li, Csaba Andras Moritz:
Skybridge: 3-D Integrated Circuit Technology Alternative to CMOS. CoRR abs/1404.0607 (2014) - [i1]Mostafizur Rahman, Santosh Khasanvis, Csaba Andras Moritz:
Nanowire Volatile RAM as an Alternative to SRAM. CoRR abs/1404.0615 (2014)
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-11-11 22:27 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
