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ORCIDSang Phill Park
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2010 – 2019
- 2016
[j6]Ayan Paul
, Sang Phill Park, Dinesh Somasekhar, Young Moon Kim, Nitin Borkar, Ulya R. Karpuzcu, Chris H. Kim:
System-Level Power Analysis of a Multicore Multipower Domain Processor With ON-Chip Voltage Regulators. IEEE Trans. Very Large Scale Integr. Syst. 24(12): 3468-3476 (2016)- 2012
- [j5]Sang Phill Park, Dongsoo Lee, Kaushik Roy:
Soft-Error-Resilient FPGAs Using Built-In 2-D Hamming Product Code. IEEE Trans. Very Large Scale Integr. Syst. 20(2): 248-256 (2012) - [c15]Sang Phill Park, Sumeet Kumar Gupta, Niladri Narayan Mojumder, Anand Raghunathan, Kaushik Roy:
Future cache design using STT MRAMs for improved energy efficiency: devices, circuits and architecture. DAC 2012: 492-497 - [c14]Sumeet Kumar Gupta, Sang Phill Park, Niladri Narayan Mojumder, Kaushik Roy:
Layout-aware optimization of stt mrams. DATE 2012: 1455-1458 - [c13]Soo Youn Kim, Wing-Fai Loke, Sang Phill Park, Byunghoo Jung, Kaushik Roy:
Poly-Si Thin Film Transistors: Opportunities for low-cost RF applications. ICICDT 2012: 1-4 - [c12]Yusung Kim, Sumeet Kumar Gupta, Sang Phill Park, Georgios Panagopoulos, Kaushik Roy:
Write-optimized reliable design of STT MRAM. ISLPED 2012: 3-8 - [c11]Chao Lu, Sang Phill Park, Vijay Raghunathan, Kaushik Roy:
Low-Overhead Maximum Power Point Tracking for Micro-Scale Solar Energy Harvesting Systems. VLSI Design 2012: 215-220 - 2011
- [c10]Chao Lu, Sang Phill Park, Vijay Raghunathan, Kaushik Roy:
Stage number optimization for switched capacitor power converters in micro-scale energy harvesting. DATE 2011: 770-775 - [c9]Sang Phill Park, Soo Youn Kim, Dongsoo Lee, Jae-Joon Kim, W. Paul Griffin, Kaushik Roy:
Column-selection-enabled 8T SRAM array with ~1R/1W multi-port operation for DVFS-enabled processors. ISLPED 2011: 303-308 - [c8]Vaibhav Gupta, Debabrata Mohapatra, Sang Phill Park, Anand Raghunathan, Kaushik Roy:
IMPACT: imprecise adders for low-power approximate computing. ISLPED 2011: 409-414 - [c7]Dongsoo Lee, Sang Phill Park, Ashish Goel, Kaushik Roy:
Memory-based embedded digital ATE. VTS 2011: 266-271 - 2010
- [j4]Ik Joon Chang, Sang Phill Park, Kaushik Roy:
Exploring Asynchronous Design Techniques for Process-Tolerant and Energy-Efficient Subthreshold Operation. IEEE J. Solid State Circuits 45(2): 401-410 (2010) - [j3]Kunhyuk Kang, Sang Phill Park, Keejong Kim, Kaushik Roy:
On-Chip Variability Sensor Using Phase-Locked Loop for Detecting and Correcting Parametric Timing Failures. IEEE Trans. Very Large Scale Integr. Syst. 18(2): 270-280 (2010) - [c6]Chao Lu, Sang Phill Park, Vijay Raghunathan, Kaushik Roy:
Efficient power conversion for ultra low voltage micro scale energy transducers. DATE 2010: 1602-1607 - [c5]Chao Lu, Sang Phill Park, Vijay Raghunathan, Kaushik Roy:
Analysis and design of ultra low power thermoelectric energy harvesting systems. ISLPED 2010: 183-188
2000 – 2009
- 2009
- [j2]Sang Phill Park, Kunhyuk Kang, Kaushik Roy:
Reliability Implications of Bias-Temperature Instability in Digital ICs. IEEE Des. Test Comput. 26(6): 8-17 (2009) - [j1]Ik Joon Chang, Jae-Joon Kim, Sang Phill Park, Kaushik Roy:
A 32 kb 10T Sub-Threshold SRAM Array With Bit-Interleaving and Differential Read Scheme in 90 nm CMOS. IEEE J. Solid State Circuits 44(2): 650-658 (2009) - 2008
- [c4]Kunhyuk Kang, Saakshi Gangwal, Sang Phill Park, Kaushik Roy:
NBTI induced performance degradation in logic and memory circuits: how effectively can we approach a reliability solution? ASP-DAC 2008: 726-731 - [c3]Jaydeep P. Kulkarni, Keejong Kim, Sang Phill Park, Kaushik Roy:
Process variation tolerant SRAM array for ultra low voltage applications. DAC 2008: 108-113 - [c2]Ik Joon Chang, Jae-Joon Kim, Sang Phill Park, Kaushik Roy:
A 32kb 10T Subthreshold SRAM Array with Bit-Interleaving and Differential Read Scheme in 90nm CMOS. ISSCC 2008: 388-389 - 2007
- [c1]Kunhyuk Kang, Sang Phill Park, Kaushik Roy, Muhammad Ashraful Alam:
Estimation of statistical variation in temporal NBTI degradation and its impact on lifetime circuit performance. ICCAD 2007: 730-734
Coauthor Index
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