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ORCIDKeejong Kim
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2010 – 2019
- 2011
[j5]Ik Joon Chang, Jae-Joon Kim, Keejong Kim, Kaushik Roy:
Robust Level Converter for Sub-Threshold/Super-Threshold Operation: 100 mV to 2.5 V. IEEE Trans. Very Large Scale Integr. Syst. 19(8): 1429-1437 (2011)- 2010
- [j4]Kunhyuk Kang, Sang Phill Park, Keejong Kim, Kaushik Roy:
On-Chip Variability Sensor Using Phase-Locked Loop for Detecting and Correcting Parametric Timing Failures. IEEE Trans. Very Large Scale Integr. Syst. 18(2): 270-280 (2010)
2000 – 2009
- 2008
- [j3]Keejong Kim, Hamid Mahmoodi
, Kaushik Roy:
A Low-Power SRAM Using Bit-Line Charge-Recycling. IEEE J. Solid State Circuits 43(2): 446-459 (2008) - [c10]Jaydeep P. Kulkarni, Keejong Kim, Sang Phill Park, Kaushik Roy:
Process variation tolerant SRAM array for ultra low voltage applications. DAC 2008: 108-113 - 2007
- [j2]Saibal Mukhopadhyay, Keejong Kim, Hamid Mahmoodi, Kaushik Roy:
Design of a Process Variation Tolerant Self-Repairing SRAM for Yield Enhancement in Nanoscaled CMOS. IEEE J. Solid State Circuits 42(6): 1370-1382 (2007) - [j1]Jaydeep P. Kulkarni, Keejong Kim, Kaushik Roy:
A 160 mV Robust Schmitt Trigger Based Subthreshold SRAM. IEEE J. Solid State Circuits 42(10): 2303-2313 (2007) - [c9]Swaroop Ghosh, Pooja Batra, Keejong Kim, Kaushik Roy:
Process-Tolerant Low-Power Adaptive Pipeline under Scaled-Vdd. CICC 2007: 733-736 - [c8]Kunhyuk Kang, Keejong Kim, Ahmad E. Islam, Muhammad Ashraful Alam, Kaushik Roy:
Characterization and Estimation of Circuit Reliability Degradation under NBTI using On-Line IDDQ Measurement. DAC 2007: 358-363 - [c7]Kunhyuk Kang, Keejong Kim, Kaushik Roy:
Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop. DAC 2007: 934-939 - [c6]Jaydeep P. Kulkarni, Keejong Kim, Kaushik Roy:
A 160 mV, fully differential, robust schmitt trigger based sub-threshold SRAM. ISLPED 2007: 171-176 - [c5]Keejong Kim, Hamid Mahmoodi, Kaushik Roy:
A low-power SRAM using bit-line charge-recycling technique. ISLPED 2007: 177-182 - [c4]Tamer Cakici, Keejong Kim, Kaushik Roy:
FinFET Based SRAM Design for Low Standby Power Applications. ISQED 2007: 127-132 - 2006
- [c3]Swaroop Ghosh, Saibal Mukhopadhyay, Keejong Kim, Kaushik Roy:
Self-calibration technique for reduction of hold failures in low-power nano-scaled SRAM. DAC 2006: 971-976 - [c2]Saibal Mukhopadhyay, Swaroop Ghosh, Keejong Kim, Kaushik Roy:
Low-Power and Process Variation Tolerant Memories in sub-90nm Technologies. SoCC 2006: 155-159 - 2005
- [c1]Keejong Kim, Chris H. Kim, Kaushik Roy:
TFT-LCD Application Specific Low Power SRAM Using Charge-Recycling Technique. ISQED 2005: 59-64
Coauthor Index
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