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ORCIDJohn C. Liobe
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2020 – today
- 2021
[j5]Gediminas Grazulevicius
, Vaidotas Barzdenas, Aleksandr Vasjanov, John C. Liobe:
Applying smart devices for gathering real-time feedback from students. Comput. Appl. Eng. Educ. 29(3): 613-623 (2021)
2010 – 2019
- 2014
- [j4]Zhe Gao, John C. Liobe, Mark F. Bocko, Zeljko Ignjatovic:
Indirect-Feedback Sigma-Delta Image Sensors: Theory, Modeling and Design. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(1): 48-60 (2014) - 2013
- [c8]Zhe Gao, John C. Liobe, Zeljko Ignjatovic, Mark F. Bocko:
Noise model of indirect-feedback sigma-delta image sensors. ISCAS 2013: 2195-2198 - [c7]Aleksandr Vasjanov, Vaidotas Barzdenas, John C. Liobe:
Implementing OCEAN scripts in RF circuit design. NORCHIP 2013: 1-4 - 2012
- [c6]Tolga Soyata, John C. Liobe:
pbCAM: Probabilistically-banked Content Addressable Memory. SoCC 2012: 27-32
2000 – 2009
- 2008
- [j3]Woogeun Rhee, Keith A. Jenkins, John C. Liobe, Herschel A. Ainspan:
Experimental Analysis of Substrate Noise Effect on PLL Performance. IEEE Trans. Circuits Syst. II Express Briefs 55-II(7): 638-642 (2008) - [j2]John C. Liobe, Richard Geisler, Martin Margala:
A Novel Application of FM-ADC Toward the Self-Calibration of Phase-Locked Loops. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(9): 2491-2504 (2008) - 2007
- [j1]John C. Liobe, Martin Margala:
Novel Process and Temperature-Stable, IDD Sensor for the BIST Design of Embedded Digital, Analog, and Mixed-Signal Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(9): 1900-1915 (2007) - [c5]John C. Liobe, Martin Margala:
Novel Process and Temperature-Stable BICS for Embedded Analog and Mixed-Signal Test. IOLTS 2007: 231-236 - [c4]Richard Geisler, John C. Liobe, Martin Margala:
Process and Temperature Calibration of PLLs with BiST Capabilities. ISCAS 2007: 3864-3867 - 2006
- [c3]Quentin Diduck, John C. Liobe, Sadeka Ali, Martin Margala:
Process tolerant calibration circuit for PLL applications with BIST. ISCAS 2006 - 2005
- [c2]Michael Wieckowski, John C. Liobe, Quentin Diduck, Martin Margala:
A New Test Methodology For DNL Error In Flash ADC's. DFT 2005: 582-590 - 2003
- [c1]Martin Margala, John C. Liobe, Quentin Diduck:
Deep-Submicron CMOS Design Methodology for High-Performance Low-Power Analog-to-Digital Converters. VLSI-SOC 2003: 380-385
Coauthor Index
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