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ORCIDEugene Shragowitz
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2010 – 2019
- 2016
[r2]Ping Deng, Weili Wu, Eugene Shragowitz, Ding-Zhu Du:
Adaptive Partitions. Encyclopedia of Algorithms 2016: 18-22
2000 – 2009
- 2008
- [r1]Ping Deng, Weili Wu, Eugene Shragowitz:
Adaptive Partitions. Encyclopedia of Algorithms 2008 - 2006
- [c19]Sungjae Kim, Eugene Shragowitz:
Iterative-Constructive Standard Cell Placer for High Speed and Low Power. ICCD 2006: 350-355 - 2003
- [j10]Eugene Shragowitz, Habib Youssef, Bing Lu:
Iterative Converging Algorithms for Computing Bounds on Durations of Activities in Pert and Pert-Like Models. J. Comb. Optim. 7(1): 5-22 (2003) - [c18]Jian Liu, Eugene Shragowitz:
Transaction-based waveform analysis for IP selection. ASP-DAC 2003: 104-107 - 2002
- [c17]Jian Liu, Ying Zhao, Eugene Shragowitz, George Karypis
:
A polynomial time approximation scheme for rectilinear Steiner minimum tree construction in the presence of obstacles. ICECS 2002: 781-784 - [c16]H. Chang, Eugene Shragowitz, Jian Liu, Habib Youssef, Bing Lu, Suphachai Sutanthavibul:
Net criticality revisited: an effective method to improve timing in physical design. ISPD 2002: 155-160 - 2001
- [j9]Jian Liu, Eugene Shragowitz, Wei-Tek Tsai:
Combining Hierarchical Filtering, Fuzzy Logic, and Simulation with Software Agents for IP (Intellectual Property) Selection in Electronic Design. Int. J. Artif. Intell. Tools 10(3): 303-323 (2001) - [j8]Bing Lu, Jun Gu, Xiao-Dong Hu, Eugene Shragowitz:
Wire segmenting for buffer insertion based on RSTP-MSP. Theor. Comput. Sci. 262(1): 257-267 (2001)
1990 – 1999
- 1998
- [j7]Eugene Shragowitz, Jun-Yong Lee, Eric Q. Kang:
Application of fuzzy logic in computer-aided VLSI design. IEEE Trans. Fuzzy Syst. 6(1): 163-172 (1998) - 1995
- [c15]Eric Q. Kang, Eugene Shragowitz:
Generic fuzzy logic CAD development tool. ASP-DAC 1995 - [c14]Jung-Yong Lee, Eugene Shragowitz:
Technology mapping for FPGAs with complex block architectures by fuzzy logic techniques. ASP-DAC 1995 - [c13]Jun-Yong Lee, Eugene Shragowitz:
Performance Driven Technology Mapper for FPGAs with Complex Logic Block Structures. ISCAS 1995: 1219-1222 - 1994
- [j6]Eric Q. Kang, Rung-Bin Lin, Eugene Shragowitz:
Fuzzy logic approach to VLSI placement. IEEE Trans. Very Large Scale Integr. Syst. 2(4): 489-501 (1994) - 1993
- [j5]Suphachai Sutanthavibul, Eugene Shragowitz, Rung-Bin Lin:
An adaptive timing-driven placement for high performance VLSIs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(10): 1488-1498 (1993) - [c12]Jaebum Lee, Eugene Shragowitz, David J. Poli:
Bounds on net lengths for high-speed PCB. ICCAD 1993: 73-76 - 1992
- [j4]Habib Youssef, Eugene Shragowitz, Suphachai Sutanthavibul:
Prelayout timing analysis of cell-based VLSI designs. Comput. Aided Des. 24(7): 367-379 (1992) - [c11]Rung-Bin Lin, Eugene Shragowitz:
Fuzzy Logic Approach to Placement Problem. DAC 1992: 153-158 - 1991
- [j3]Suphachai Sutanthavibul, Eugene Shragowitz, J. Ben Rosen:
An analytical approach to floorplan design and optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(6): 761-769 (1991) - [c10]Suphachai Sutanthavibul, Eugene Shragowitz:
Dynamic Prediction of Critical Paths and Nets for Constructive Timing-Driven Placement. DAC 1991: 632-635 - [c9]Habib Youssef, Rung-Bin Lin, Eugene Shragowitz:
Bounds on Net Delays for Physical Design of Fast Circuits. VLSI 1991: 111-118 - 1990
- [c8]Suphachai Sutanthavibul, Eugene Shragowitz:
An Adaptive Timing-Driven Layout for High Speed VLSI. DAC 1990: 90-95 - [c7]Suphachai Sutanthavibul, Eugene Shragowitz, J. Ben Rosen:
An Analytical Approach to Floorplan Design and Optimization. DAC 1990: 187-192 - [c6]Habib Youssef, Eugene Shragowitz:
Timing Constraints for Correct Performance. ICCAD 1990: 24-27
1980 – 1989
- 1989
- [c5]Habib Youssef, Eugene Shragowitz, Lionel Bening:
Critical path issue in VLSI design. ICCAD 1989: 520-523 - 1988
- [j2]Jong Lee, Eugene Shragowitz, Sartaj Sahni:
A Hypercube Algorithm for the 0/1 Knapsack Problem. J. Parallel Distributed Comput. 5(4): 438-456 (1988) - 1987
- [j1]Eugene Shragowitz, S. Keel:
A global router based on a multicommodity flow model. Integr. 5(1): 3-16 (1987) - [c4]Jong Lee, Sartaj Sahni, Eugene Shragowitz:
A Hypecube Algorithm for the 0/1 Knapsack Problem. ICPP 1987: 699-706 - 1986
- [c3]Surendra Nahar, Sartaj Sahni, Eugene Shragowitz:
Simulated annealing and combinatorial optimization. DAC 1986: 293-299 - [c2]David E. Krekelberg, Eugene Shragowitz, Gerald E. Sobelman, Li-Shin Lin:
Automated layout synthesis in the YASC silicon compiler. DAC 1986: 447-453 - 1985
- [c1]Surendra Nahar, Sartaj Sahni, Eugene Shragowitz:
Experiments with simulated annealing. DAC 1985: 748-752
Coauthor Index
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