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ORCIDPhilippe Galy
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Journal Articles
- 2019
[j17]Carlos Marquez
, Carlos Navarro, Santiago Navarro, José Luis Padilla, Luca Donetti, Carlos Sampedro, Philippe Galy, Yong-Tae Kim, Francisco Gámiz:
On the Low-Frequency Noise Characterization of Z2-FET Devices. IEEE Access 7: 42551-42556 (2019)- 2018
- [j16]Jorge Loayza, Nicolas Guitard, Bruno Allard, Luong-Viêt Phung, Blaise Jacquier, Philippe Galy:
Simulation, characterization and implementation of a new SCR-based device with a turn-off capability for EOS-immune ESD power supply clamps in advanced CMOS technology nodes. Microelectron. Reliab. 85: 176-189 (2018) - 2017
- [j15]Philippe Galy, Wim Schoenmaker:
Exploration of robustness limits and ESD EMI impact in a protection device for advanced CMOS technology. Microelectron. Reliab. 76-77: 680-684 (2017) - 2016
- [j14]Benjamin Viale, Mathieu Fer, Lionel Courau, Philippe Galy, Bruno Allard:
On the need for a new ESD verification methodology to improve the reliability of ICs in advanced 28nm UTBB FD-SOI technology. Microelectron. Reliab. 64: 101-108 (2016) - 2015
- [j13]Philippe Galy, Wim Schoenmaker:
Coupled electro-magnetic field & Lorentz force effects in silicon and metal for ESD investigation in transient and harmonic regimes. Microelectron. Reliab. 55(9-10): 1532-1536 (2015) - 2014
- [j12]Wim Schoenmaker, Quan Chen, Philippe Galy:
Computation of Self-Induced Magnetic Field Effects Including the Lorentz Force for Fast-Transient Phenomena in Integrated-Circuit Devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(6): 893-902 (2014) - 2013
- [j11]Philippe Galy, T. Lim, J. Bourgeat, Jean Jimenez, Boris Heitz, D. Marin-Cudraz, Ph. Benech, J. M. Fournier:
Symmetrical ESD protection for advanced CMOS technology dedicated to 100 GHz RF application. Microelectron. Reliab. 53(9-11): 1284-1287 (2013) - 2012
- [j10]Philippe Galy, Johan Bourgeat, Jean Jimenez, Nicolas Guitard, Alexandre Dray, Ghislain Troussier, Blaise Jacquier, David Marin-Cudraz:
Symmetrical ESD trigger and pull-up using BIMOS transistor in advanced CMOS technology. Microelectron. Reliab. 52(9-10): 1998-2004 (2012) - 2011
- [j9]Philippe Galy, J. Bourgeat, Jean Jimenez, Blaise Jacquier, D. Marin-Cudraz, Sylvain Dudit:
Reliability impact due to high current, lattice and hot carriers temperatures on β(2×2) matrix ESD power devices for advanced CMOS technologies. Microelectron. Reliab. 51(9-11): 1608-1613 (2011) - [j8]J. Bourgeat, Philippe Galy, A. Dray, Jean Jimenez, D. Marin-Cudraz, Blaise Jacquier:
A full characterization of single pitch IO ESD protection based on silicon controlled rectifier and dynamic trigger circuit in CMOS 32 nm node. Microelectron. Reliab. 51(9-11): 1614-1617 (2011) - 2010
- [j7]J. Bourgeat, Christophe Entringer, Philippe Galy, Marise Bafleur, D. Marin-Cudraz:
Evaluation of the ESD performance of local protections based on SCR or bi-SCR with dynamic or static trigger circuit in 32 nm. Microelectron. Reliab. 50(9-11): 1379-1382 (2010) - [j6]Philippe Galy, Sylvain Dudit, Michel Vallet, Ph. Larre, M. Bilinski, E. Petit, J. Beltritti, A. Dray, Jean Jimenez, Frank Jezequel, R. Chevallier, C. Boutonnat, V. Varo:
Inventory of silicon signatures induced by CDM event on deep sub-micronic CMOS-BICMOS technologies. Microelectron. Reliab. 50(9-11): 1388-1392 (2010) - 2009
- [j5]Philippe Galy, Sylvain Dudit, Michel Vallet, Corinne Richier, Christophe Entringer, Frank Jezequel, E. Petit, J. Beltritti:
Impact and damage on deep sub-micron CMOS technology induced by substrate current due to ESD stress. Microelectron. Reliab. 49(9-11): 1107-1110 (2009) - 2006
- [j4]Christophe Entringer, Philippe Flatresse, Philippe Galy, Florence Azaïs, Pascal Nouet:
Electro-thermal short pulsed simulation for SOI technology. Microelectron. Reliab. 46(9-11): 1482-1485 (2006) - 2004
- [j3]Philippe Galy, V. Berland, A. Guilhaume, F. Blanc, J. P. Chante:
Experimental measurements and 3D simulation of the parasitic lateral bipolar transistor triggering within a single finger gg-nMOS under ESD. Microelectron. Reliab. 44(9-11): 1775-1780 (2004) - 2002
- [j2]Philippe Galy, V. Berland, B. Foucher, A. Guilhaume, J. P. Chante, S. Bardy, F. Blanc:
Experimental and 3D simulation correlation of a gg-nMOS transistor under high current pulse. Microelectron. Reliab. 42(9-11): 1299-1302 (2002) - 2001
- [j1]A. Guilhaume, Philippe Galy, J. P. Chante, B. Foucher, F. Blanc:
Simulation and experimental comparison of GGNMOS and LVTSCR protection cells under ElectroStatic Discharges. Microelectron. Reliab. 41(9-10): 1433-1437 (2001)
Conference and Workshop Papers
- 2024
- [c20]Giovani Britton, Salvador Mir, Estelle Lauga-Larroze, Benjamin Dormieu, Joseph Lugo, Joao Azevedo, Sebastien Sadlo, Quentin Berlingard, Mikaël Cassé, Philippe Galy:
LUT-Based Design of a Cryogenic Cascode LNA with Simultaneous Noise and Power Matching. NewCAS 2024: 65-69 - 2023
- [c19]Giovani Britton, Salvador Mir, Estelle Lauga-Larroze, Benjamin Dormieu, Quentin Berlingard, Mikaël Cassé, Philippe Galy:
Noise modeling using look-up tables and DC measurements for cryogenic applications. VLSI-SoC 2023: 1-6 - 2022
- [c18]Lauriane Contamin, Mikaël Cassé, Xavier Garros, Fred Gaillard, Maud Vinet, Philippe Galy, André Juge, Emmanuel Vincent, Silvano De Franceschi, Tristan Meunier:
Fast Measurement of BTI on 28nm Fully Depleted Silicon-On-Insulator MOSFETs at Cryogenic Temperature down to 4K. IRPS 2022: 7 - 2020
- [c17]Mohammed Tmimi, Stefano D'Amico, Jean-Marc Duchamp, Philippe Ferrari, Philippe Galy:
7-mm low-latency inter-chiplet serial link with silicon interposer. MWSCAS 2020: 683-686 - 2019
- [c16]Carlos Marquez, Santiago Navarro, Carlos Navarro, Norberto Salazar, Philippe Galy, Sorin Cristoloveanu, Francisco Gámiz:
Temperature and Gate Leakage Influence on the Z2-FET Memory Operation. ESSDERC 2019: 238-241 - [c15]Philippe Galy, R. Lethiecq, Maryline Bawedin:
1T1C Ultra low power relative Thermal-Voltage sensor in 28nm UTBB FD-SOI CMOS technology for standard, spatial and quantum applications. ICICDT 2019: 1-4 - [c14]R. Lethiecq, Maryline Bawedin, Philippe Galy:
Compact MOS Structure & Design for Ion-Ioff Thermal control in 28nm UTBB FD-SOI CMOS technology. ICICDT 2019: 1-4 - [c13]Mohammed Tmimi, Stefano D'Amico, Jean-Marc Duchamp, Philippe Ferrari, Philippe Galy:
10Gbps Length adaptive on-chip RF serial link for Network on Chips and Multiprocessor chips applications. ICICDT 2019: 1-4 - [c12]Louise De Conti, Sorin Cristoloveanu, Maud Vinet, Philippe Galy:
Thin-Film FD-SOI BIMOS Topologies for ESD Protection. IRPS 2019: 1-5 - 2018
- [c11]Philippe Galy, R. Lethiecq, Maryline Bawedin:
Optimized in situ heating control on a new MOS device structure in 28nm UTBB FD-SOI CMOS technology. ICICDT 2018: 157-160 - 2017
- [c10]Louise De Conti, Thomas Bedecarrats, Maud Vinet, Sorin Cristoloveanu, Philippe Galy:
Toward Gated-Diode-BIMOS for thin silicon ESD protection in advanced FD-SOI CMOS technologies. ICICDT 2017: 1-4 - 2016
- [c9]Philippe Galy, S. Athanasiou:
Preliminary results on TFET - Gated diode in thin silicon film for IO design & ESD protection in 28nm UTBB FD-SOI CMOS technology. ICICDT 2016: 1-4 - 2015
- [c8]S. Athanasiou, Sorin Cristoloveanu, Philippe Galy:
Preliminary 3D TCAD electro-thermal simulations of BIMOS transistor in thin silicon film for ESD protection in FDSOI UTBB CMOS technology. ICICDT 2015: 1-4 - [c7]Wim Schoenmaker, Philippe Galy:
Integrated front-end/back-end simulation of electromagnetic fields, Lorentz force effects and fast current surges in microelectronic protection devices. ICICDT 2015: 1-4 - 2014
- [c6]Philippe Galy, J. Bourgeat, D. Marin-Cudraz:
New modular bi-directional power-switch and self ESD protected in 28nm UTBB FDSOI advanced CMOS technology. ICICDT 2014: 1-4 - 2013
- [c5]Vivek Asthana, Malathi Kar, Jean Jimenez, Jean-Philippe Noel, Sébastien Haendler, Philippe Galy:
Circuit optimization of 4T, 6T, 8T, 10T SRAM bitcells in 28nm UTBB FD-SOI technology using back-gate bias control. ESSCIRC 2013: 415-418 - [c4]Vivek Asthana, Malathi Kar, Jean Jimenez, Sébastien Haendler, Philippe Galy:
6T SRAM performance and power gain using double gate MOS in 28nm FDSOI technology. ICICDT 2013: 89-92 - [c3]Philippe Galy, T. Lim, Jean Jimenez, Boris Heitz, Ph. Benech, J. M. Fournier, D. Marin-Cudraz:
ESD protection using BIMOS transistor in 100 GHz RF application for advanced CMOS technology. ICICDT 2013: 199-202 - 2012
- [c2]Philippe Galy, Jean Jimenez, Johan Bourgeat, A. Dray, Ghislain Troussier, Boris Heitz, Nicolas Guitard, David Marin-Cudraz, H. Beckrich-Ros:
BIMOS transistor and its applications in ESD protection in advanced CMOS technology. ICICDT 2012: 1-4 - [c1]Jean Jimenez, Philippe Galy, Johan Bourgeat, Boris Heitz:
High swing low capacitance ESD RF protections in advanced CMOS technologies. ICICDT 2012: 1-4
Informal and Other Publications
- 2023
- [i1]Joao Henrique Quintino Palhares, Yann Beilliard, Jury Sandrini, Franck Arnaud, Kevin Garello, Guillaume Prenat, Lorena Anghel, Fabien Alibart, Dominique Drouin, Philippe Galy:
A tunable and versatile 28nm FD-SOI crossbar output circuit for low power analog SNN inference with eNVM synapses. CoRR abs/2305.16187 (2023)
Coauthor Index
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