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ORCIDDwight D. Hill
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2010 – 2019
- 2012
[c17]Pinaki Chakrabarti, Vikram Bhatt, Dwight D. Hill, Aiqun Cao:
Clock mesh framework. ISQED 2012: 424-431
2000 – 2009
- 2004
- [j10]Dwight D. Hill, Andrew B. Kahng:
Guest Editors' Introduction: RTL to GDSII - From Foilware to Standard Practice. IEEE Des. Test Comput. 21(1): 9-12 (2004) - 2000
- [j9]Martin D. F. Wong
, Dwight D. Hill:
Editorial. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(2): 173-174 (2000) - [j8]Don MacMillen, Raul Camposano, Dwight D. Hill, Thomas W. Williams:
An industrial view of electronic design automation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(12): 1428-1448 (2000) - [e1]Manfred Wiesel, Dwight D. Hill:
Proceedings of the 2000 International Symposium on Physical Design, ISPD 2000, San Diego, CA, USA, April 9-12, 2000. ACM 2000, ISBN 1-58113-191-7 [contents]
1990 – 1999
- 1997
- [c16]Jonathan Rose, Dwight D. Hill:
Architectural and Physical Design Challenges for One-Million Gate FPGAs and Beyond. FPGA 1997: 129-132 - 1993
- [j7]Dwight D. Hill, Nam Sung Woo:
The benefits of flexibility in lookup table-based FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(2): 349-353 (1993) - 1992
- [j6]Dominique Borrione, Robert Piloty, Dwight D. Hill, Karl J. Lieberherr, Philip Moorby:
Three Decades of HDLs: Part II, Conlan Through Verilog. IEEE Des. Test Comput. 9(3): 54-63 (1992) - [c15]Dwight D. Hill, Ewald Detjens:
FPGA Design Principles (A Tutorial). DAC 1992: 45-46 - [c14]Dwight D. Hill, Barry K. Britton, William Oswald, Nam Sung Woo, Satwant Singh, Che-Tsung Chen, Bob Krambeck:
ORCA: A New Architecture for High-Performance FPLs. FPL 1992: 52-60 - [c13]Narasimha B. Bhat, Dwight D. Hill:
Routable Technologie Mapping for LUT FPGAs. ICCD 1992: 95-98 - 1991
- [c12]Dwight D. Hill:
A CAD System for the Design of Field Programmable Gate Arrays. DAC 1991: 187-192 - 1990
- [c11]Dwight D. Hill, Don Shugard:
Global Routing Considerations in a Cell Synthesis System. DAC 1990: 312-316 - [c10]Dwight D. Hill, Bryan Preas:
Benchmarks for Cell Synthesis. DAC 1990: 317-320 - [c9]Dwight D. Hill, Daniel R. Cassiday:
Preliminary description of Tabula Rasa, an electrically reconfigurable hardware engine. ICCD 1990: 391-395 - [c8]Dwight D. Hill, Marw A. Aranha, Donald D. Shugard:
Placement algorithms for CMOS cell synthesis. ICCD 1990: 454-458
1980 – 1989
- 1988
- [c7]Dwight D. Hill:
Alternative strategies for applying min-cut to VLSI placement. ICCD 1988: 440-444 - 1985
- [c6]Dwight D. Hill, Shaibal Roy:
Prolog in CMOS Circuit Design. COMPCON 1985: 211-217 - [c5]Dwight D. Hill, John P. Fishburn, Mary Diane Palmer Leland:
Effective use of virtual grid compaction in macro-module generators. DAC 1985: 777-780 - [c4]Ran Ginosar, Dwight D. Hill:
Design and Implementation of Switching Systems for Parallel Processors. ICPP 1985: 674-680 - 1984
- [j5]Dwight D. Hill:
Icon: A Tool for Design at Schematic, Virtual Grid, and Layout Levels. IEEE Des. Test 1(4): 53-60 (1984) - [c3]John O. Limb, Dwight D. Hill, Jon W. Mark, D. K. Sharma, H. A. Wilder:
An Architecture and Protocol for a high Speed Local Area Network Supporting Integrated Traffic. INFOCOM 1984: 148-155 - 1983
- [j4]Dwight D. Hill:
An analysis of C machine support for other block-structured languages. SIGARCH Comput. Archit. News 11(4): 6-16 (1983) - [j3]Dwight D. Hill:
Edisim: A Graphical Simulator Interface for LSI Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2(2): 57-61 (1983) - [c2]Dwight D. Hill:
Edisim and Edicap: Graphical simulator interfaces. DAC 1983: 608-614 - 1982
- [j2]Dwight D. Hill:
Dragnet: a local network with protection. Comput. Commun. Rev. 12(3-4): 92-98 (1982) - 1981
- [j1]Dwight D. Hill:
A hardware mechanism for supporting range checks. SIGARCH Comput. Archit. News 9(4): 15-21 (1981)
1970 – 1979
- 1979
- [c1]Dwight D. Hill, William M. van Cleemput:
SABLE: A tool for generating structured, multi-level simulations. DAC 1979: 272-279
Coauthor Index
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