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ORCIDPriyanka Raina
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2020 – today
- 2024
[j18]Kathleen Feng
, Taeyoung Kong, Kalhan Koul, Jackson Melchert, Alex Carsello, Qiaoyi Liu, Gedeon Nyengele, Maxwell Strange, Keyi Zhang, Ankita Nayak, Jeff Setter, James Thomas, Kavya Sreedhar, Po-Han Chen, Nikhil Bhagdikar, Zachary Myers, Brandon D'Agostino, Pranil Joshi, Stephen Richardson, Christopher Torng, Mark Horowitz, Priyanka Raina:
Amber: A 16-nm System-on-Chip With a Coarse- Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra. IEEE J. Solid State Circuits 59(3): 947-959 (2024)- [j17]Akash Levy, Luke R. Upton, Michael D. Scott, Dennis Rich, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Subhasish Mitra, Boris Murmann, Priyanka Raina:
EMBER: Efficient Multiple-Bits-Per-Cell Embedded RRAM Macro for High-Density Digital Storage. IEEE J. Solid State Circuits 59(7): 2081-2092 (2024) - [j16]Jackson Melchert, Yuchen Mei, Kalhan Koul, Qiaoyi Liu, Mark Horowitz, Priyanka Raina:
Cascade: An Application Pipelining Toolkit for Coarse-Grained Reconfigurable Arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(10): 3055-3067 (2024) - [c30]Jeffrey Yu, Kartik Prabhu, Yonatan Urman, Robert M. Radway, Eric Han, Priyanka Raina:
8-bit Transformer Inference and Fine-tuning for Edge Accelerators. ASPLOS (3) 2024: 5-21 - [c29]Kalhan Koul, Maxwell Strange, Jackson Melchert, Alex Carsello, Yuchen Mei, Olivia Hsu, Taeyoung Kong, Po-Han Chen, Huifeng Ke, Keyi Zhang, Qiaoyi Liu, Gedeon Nyengele, Akhilesh Balasingam, Jayashree Adivarahan, Ritvik Sharma, Zhouhua Xie, Christopher Torng, Joel S. Emer, Fredrik Kjolstad, Mark Horowitz, Priyanka Raina:
Onyx: A Programmable Accelerator for Sparse Tensor Algebra. HCS 2024: 1-91 - [c28]Akash Levy, Joe Walston, Sourav Samanta, Priyanka Raina, Stelios Diamantidis:
FastPASE: An AI-Driven Fast PPA Speculation Engine for RTL Design Space Optimization. ISQED 2024: 1-8 - [c27]Kalhan Koul, Maxwell Strange, Jackson Melchert, Alex Carsello, Yuchen Mei, Olivia Hsu, Taeyoung Kong, Po-Han Chen, Huifeng Ke, Keyi Zhang, Qiaoyi Liu, Gedeon Nyengele, Akhilesh Balasingam, Jayashree Adivarahan, Ritvik Sharma, Zhouhua Xie, Christopher Torng, Joel S. Emer, Fredrik Kjolstad, Mark Horowitz, Priyanka Raina:
Onyx: A 12nm 756 GOPS/W Coarse-Grained Reconfigurable Array for Accelerating Dense and Sparse Applications. VLSI Technology and Circuits 2024: 1-2 - [c26]Kartik Prabhu, Robert M. Radway, Y. Jeffrey, Kai Bartolone, Massimo Giordano, Fabian Peddinghaus, Yonatan Urman, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Subhasish Mitra, Priyanka Raina:
MINOTAUR: An Edge Transformer Inference and Training Accelerator with 12 MBytes On-Chip Resistive RAM and Fine-Grained Spatiotemporal Power Gating. VLSI Technology and Circuits 2024: 1-2 - [i10]Ross Daly, Caleb Donovick, Caleb Terrill, Jackson Melchert, Priyanka Raina, Clark W. Barrett, Pat Hanrahan:
Efficiently Synthesizing Lowest Cost Rewrite Rules for Instruction Selection. CoRR abs/2405.06127 (2024) - 2023
- [j15]Jackson Melchert, Keyi Zhang, Yuchen Mei, Mark Horowitz, Christopher Torng, Priyanka Raina:
Canal: A Flexible Interconnect Generator for Coarse-Grained Reconfigurable Arrays. IEEE Comput. Archit. Lett. 22(1): 45-48 (2023) - [j14]Akash Levy, Michael Oduoza, Akhilesh Balasingam, Roger T. Howe, Priyanka Raina:
3-D coarse-grained reconfigurable array using multi-pole NEM relays for programmable routing. Integr. 88: 249-261 (2023) - [j13]Priyanka Raina, Rodrigo Guinea, Kasit Chatsirisupachai, Inês Lopes, Zoya Farooq, Cristina Guinea, Csaba-Attila Solyom, João Pedro de Magalhães:
GeneFriends: gene co-expression databases and tools for humans and model organisms. Nucleic Acids Res. 51(D1): 145-158 (2023) - [j12]Qiaoyi Liu, Jeff Setter, Dillon Huff, Maxwell Strange, Kathleen Feng, Mark Horowitz, Priyanka Raina, Fredrik Kjolstad:
Unified Buffer: Compiling Image Processing and Machine Learning Applications to Push-Memory Accelerators. ACM Trans. Archit. Code Optim. 20(2): 26:1-26:26 (2023) - [j11]Kalhan Koul, Jackson Melchert, Kavya Sreedhar, Leonard Truong, Gedeon Nyengele, Keyi Zhang, Qiaoyi Liu, Jeff Setter, Po-Han Chen, Yuchen Mei, Maxwell Strange, Ross Daly, Caleb Donovick, Alex Carsello, Taeyoung Kong, Kathleen Feng, Dillon Huff, Ankita Nayak, Rajsekhar Setaluri, James Thomas, Nikhil Bhagdikar, David Durst, Zachary Myers, Nestan Tsiskaridze, Stephen Richardson, Rick Bahr, Kayvon Fatahalian, Pat Hanrahan, Clark W. Barrett, Mark Horowitz, Christopher Torng, Fredrik Kjolstad, Priyanka Raina:
AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers. ACM Trans. Embed. Comput. Syst. 22(2): 35:1-35:34 (2023) - [j10]Ankita Nayak, Keyi Zhang, Rajsekhar Setaluri, Alex Carsello, Makai Mann, Christopher Torng, Stephen Richardson, Rick Bahr, Pat Hanrahan, Mark Horowitz, Priyanka Raina:
Improving Energy Efficiency of CGRAs with Low-Overhead Fine-Grained Power Domains. ACM Trans. Reconfigurable Technol. Syst. 16(2): 26:1-26:28 (2023) - [c25]Jackson Melchert, Kathleen Feng, Caleb Donovick, Ross Daly, Ritvik Sharma, Clark W. Barrett, Mark A. Horowitz, Pat Hanrahan, Priyanka Raina:
APEX: A Framework for Automated Processing Element Design Space Exploration using Frequent Subgraph Analysis. ASPLOS (3) 2023: 33-45 - [c24]Tathagata Srimani, Robert M. Radway, Jinwoo Kim, Kartik Prabhu, Dennis Rich, Carlo Gilardi, Priyanka Raina, Max M. Shulaker, Sung Kyu Lim, Subhasish Mitra:
Ultra-Dense 3D Physical Design Unlocks New Architectural Design Points with Large Benefits. DATE 2023: 1-6 - [c23]Luke R. Upton, Akash Levy, Michael D. Scott, Dennis Rich, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Subhasish Mitra, Priyanka Raina, Boris Murmann:
EMBER: A 100 MHz, 0.86 mm2, Multiple-Bits-per-Cell RRAM Macro in 40 nm CMOS with Compact Peripherals and 1.0 pJ/bit Read Circuitry. ESSCIRC 2023: 469-472 - [c22]Anjiang Wei, Akash Levy, Pu Yi, Robert M. Radway, Priyanka Raina, Subhasish Mitra, Sara Achour:
PBA: Percentile-Based Level Allocation for Multiple-Bits-Per-Cell RRAM. ICCAD 2023: 1-9 - [c21]Po-Han Chen, Charles Tsao, Priyanka Raina:
An Open-Source $4 \times 8$ Coarse-Grained Reconfigurable Array Using SkyWater 130 nm Technology and Agile Hardware Design Flow. ISCAS 2023: 1-5 - [i9]Taeyoung Kong, Kalhan Koul, Priyanka Raina, Mark Horowitz, Christopher Torng:
Hardware Abstractions and Hardware Mechanisms to Support Multi-Task Execution on Coarse-Grained Reconfigurable Arrays. CoRR abs/2301.00861 (2023) - [i8]Caleb Donovick, Ross Daly, Jackson Melchert, Lenny Truong, Priyanka Raina, Pat Hanrahan, Clark W. Barrett:
PEak: A Single Source of Truth for Hardware Design and Verification. CoRR abs/2308.13106 (2023) - 2022
- [j9]Kartik Prabhu, Albert Gural, Zainab F. Khan, Robert M. Radway, Massimo Giordano, Kalhan Koul, Rohan Doshi, John W. Kustin, Timothy Liu, Gregorio B. Lopes, Victor Turbiner, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Guénolé Lallement, Boris Murmann, Subhasish Mitra, Priyanka Raina:
CHIMERA: A 0.92-TOPS, 2.2-TOPS/W Edge AI Accelerator With 2-MByte On-Chip Foundry Resistive RAM for Efficient Training and Inference. IEEE J. Solid State Circuits 57(4): 1013-1026 (2022) - [j8]Weier Wan, Rajkumar Kubendran, Clemens J. S. Schaefer, Sukru Burc Eryilmaz, Wenqiang Zhang, Dabin Wu, Stephen R. Deiss, Priyanka Raina, He Qian, Bin Gao, Siddharth Joshi, Huaqiang Wu, H.-S. Philip Wong, Gert Cauwenberghs:
A compute-in-memory chip based on resistive random-access memory. Nat. 608(7923): 504-512 (2022) - [j7]Xin Zheng, Ryan Zarcone, Akash Levy, Win-San Khwa, Priyanka Raina, Bruno A. Olshausen, H.-S. Philip Wong:
High-density analog image storage in an analog-valued non-volatile memory array. Neuromorph. Comput. Eng. 2(4): 44018 (2022) - [c20]Akash Levy, Michael Oduoza, Akhilesh Balasingam, Roger T. Howe, Priyanka Raina:
Efficient Routing in Coarse-Grained Reconfigurable Arrays Using Multi-Pole NEM Relays. ASP-DAC 2022: 472-478 - [c19]Alex Carsello, James Thomas, Ankita Nayak, Po-Han Chen, Mark Horowitz, Priyanka Raina, Christopher Torng:
mflowgen: a modular flow generator and ecosystem for community-driven physical design: invited. DAC 2022: 1339-1342 - [c18]Ross Daly, Caleb Donovick, Jackson Melchert, Rajsekhar Setaluri, Nestan Tsiskaridze, Priyanka Raina, Clark W. Barrett, Pat Hanrahan:
Synthesizing Instruction Selection Rewrite Rules from RTL using SMT. FMCAD 2022: 139-150 - [c17]Kathleen Feng, Alex Carsello, Taeyoung Kong, Kalhan Koul, Qiaoyi Liu, Jackson Melchert, Gedeon Nyengele, Maxwell Strange, Keyi Zhang, Ankita Nayak, Jeff Setter, James Thomas, Kavya Sreedhar, Po-Han Chen, Nikhil Bhagdikar, Zachary Myers, Brandon D'Agostino, Pranil Joshi, Stephen Richardson, Rick Bahr, Christopher Torng, Mark Horowitz, Priyanka Raina:
Amber: Coarse-Grained Reconfigurable Array-Based SoC for Dense Linear Algebra Acceleration. HCS 2022: 1-30 - [c16]Alex Carsello, Kathleen Feng, Taeyoung Kong, Kalhan Koul, Qiaoyi Liu, Jackson Melchert, Gedeon Nyengele, Maxwell Strange, Keyi Zhang, Ankita Nayak, Jeff Setter, James Thomas, Kavya Sreedhar, Po-Han Chen, Nikhil Bhagdikar, Zachary Myers, Brandon D'Agostino, Pranil Joshi, Stephen Richardson, Rick Bahr, Christopher Torng, Mark Horowitz, Priyanka Raina:
Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra. VLSI Technology and Circuits 2022: 70-71 - [i7]Jackson Melchert, Yuchen Mei, Kalhan Koul, Qiaoyi Liu, Mark Horowitz, Priyanka Raina:
Cascade: An Application Pipelining Toolkit for Coarse-Grained Reconfigurable Arrays. CoRR abs/2211.13182 (2022) - [i6]Jackson Melchert, Keyi Zhang, Yuchen Mei, Mark Horowitz, Christopher Torng, Priyanka Raina:
Canal: A Flexible Interconnect Generator for Coarse-Grained Reconfigurable Arrays. CoRR abs/2211.17207 (2022) - 2021
- [j6]Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler:
Simba: scaling deep-learning inference with chiplet-based architecture. Commun. ACM 64(6): 107-116 (2021) - [j5]Priyanka Raina, Cliff Young:
Best Papers From Hot Chips 32. IEEE Micro 41(2): 6 (2021) - [c15]Massimo Giordano, Kartik Prabhu, Kalhan Koul, Robert M. Radway, Albert Gural, Rohan Doshi, Zainab F. Khan, John W. Kustin, Timothy Liu, Gregorio B. Lopes, Victor Turbiner, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Guénolé Lallement, Boris Murmann, Subhasish Mitra, Priyanka Raina:
CHIMERA: A 0.92 TOPS, 2.2 TOPS/W Edge AI Accelerator with 2 MByte On-Chip Foundry Resistive RAM for Efficient Training and Inference. VLSI Circuits 2021: 1-2 - [i5]Jackson Melchert, Kathleen Feng, Caleb Donovick, Ross Daly, Clark W. Barrett, Mark Horowitz, Pat Hanrahan, Priyanka Raina:
Automated Design Space Exploration of CGRA Processing Element Architectures using Frequent Subgraph Analysis. CoRR abs/2104.14155 (2021) - [i4]Qiaoyi Liu, Dillon Huff, Jeff Setter, Maxwell Strange, Kathleen Feng, Kavya Sreedhar, Ziheng Wang, Keyi Zhang, Mark Horowitz, Priyanka Raina, Fredrik Kjolstad:
Compiling Halide Programs to Push-Memory Accelerators. CoRR abs/2105.12858 (2021) - [i3]Weier Wan, Rajkumar Kubendran, Clemens J. S. Schaefer, Sukru Burc Eryilmaz, Wenqiang Zhang, Dabin Wu, Stephen R. Deiss, Priyanka Raina, He Qian, Bin Gao, Siddharth Joshi, Huaqiang Wu, H.-S. Philip Wong, Gert Cauwenberghs:
Edge AI without Compromise: Efficient, Versatile and Accurate Neurocomputing in Resistive Random-Access Memory. CoRR abs/2108.07879 (2021) - [i2]Alex Carsello, James Thomas, Ankita Nayak, Po-Han Chen, Mark Horowitz, Priyanka Raina, Christopher Torng:
Enabling Reusable Physical Design Flows with Modular Flow Generators. CoRR abs/2111.14535 (2021) - 2020
- [j4]Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany:
A 0.32-128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm. IEEE J. Solid State Circuits 55(4): 920-932 (2020) - [c14]Xuan Yang, Mingyu Gao, Qiaoyi Liu, Jeff Setter, Jing Pu, Ankita Nayak, Steven Bell, Kaidi Cao, Heonjae Ha, Priyanka Raina, Christos Kozyrakis, Mark Horowitz:
Interstellar: Using Halide's Scheduling Language to Analyze DNN Accelerators. ASPLOS 2020: 369-383 - [c13]Rick Bahr, Clark W. Barrett, Nikhil Bhagdikar, Alex Carsello, Ross Daly, Caleb Donovick, David Durst, Kayvon Fatahalian, Kathleen Feng, Pat Hanrahan, Teguh Hofstee, Mark Horowitz, Dillon Huff, Fredrik Kjolstad, Taeyoung Kong, Qiaoyi Liu, Makai Mann, Jackson Melchert, Ankita Nayak, Aina Niemetz, Gedeon Nyengele, Priyanka Raina, Stephen Richardson, Rajsekhar Setaluri, Jeff Setter, Kavya Sreedhar, Maxwell Strange, James Thomas, Christopher Torng, Leonard Truong, Nestan Tsiskaridze, Keyi Zhang:
Creating an Agile Hardware Design Flow. DAC 2020: 1-6 - [c12]Eshan Singh, Florian Lonsing, Saranyu Chattopadhyay, Maxwell Strange, Peng Wei, Xiaofan Zhang, Yuan Zhou, Deming Chen, Jason Cong, Priyanka Raina, Zhiru Zhang, Clark W. Barrett, Subhasish Mitra:
A-QED Verification of Hardware Accelerators. DAC 2020: 1-6 - [c11]Ankita Nayak, Keyi Zhang, Rajsekhar Setaluri, Alex Carsello, Makai Mann, Stephen Richardson, Rick Bahr, Pat Hanrahan, Mark Horowitz, Priyanka Raina:
A Framework for Adding Low-Overhead, Fine-Grained Power Domains to CGRAs. DATE 2020: 846-851 - [c10]Makena Low, Victor Huang, Priyanka Raina:
Automating Vitiligo Skin Lesion Segmentation Using Convolutional Neural Networks. ISBI 2020: 1-4 - [c9]Weier Wan, Rajkumar Kubendran, Sukru Burc Eryilmaz, Wenqiang Zhang, Yan Liao, Dabin Wu, Stephen R. Deiss, Bin Gao, Priyanka Raina, Siddharth Joshi, Huaqiang Wu, Gert Cauwenberghs, H.-S. Philip Wong:
33.1 A 74 TMACS/W CMOS-RRAM Neurosynaptic Core with Dynamically Reconfigurable Dataflow and In-situ Transposable Weights for Probabilistic Graphical Models. ISSCC 2020: 498-500
2010 – 2019
- 2019
- [c8]Rangharajan Venkatesan, Yakun Sophia Shao, Brian Zimmer, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany:
A 0.11 PJ/OP, 0.32-128 Tops, Scalable Multi-Chip-Module-Based Deep Neural Network Accelerator Designed with A High-Productivity vlsi Methodology. Hot Chips Symposium 2019: 1-24 - [c7]Rangharajan Venkatesan, Yakun Sophia Shao, Miaorong Wang, Jason Clemons, Steve Dai, Matthew Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Yanqing Zhang, Brian Zimmer, William J. Dally, Joel S. Emer, Stephen W. Keckler, Brucek Khailany:
MAGNet: A Modular Accelerator Generator for Neural Networks. ICCAD 2019: 1-8 - [c6]Angshuman Parashar, Priyanka Raina, Yakun Sophia Shao, Yu-Hsin Chen, Victor A. Ying, Anurag Mukkara, Rangharajan Venkatesan, Brucek Khailany, Stephen W. Keckler, Joel S. Emer:
Timeloop: A Systematic Approach to DNN Accelerator Evaluation. ISPASS 2019: 304-315 - [c5]Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler:
Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture. MICRO 2019: 14-27 - [c4]Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany:
A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator with Ground-Reference Signaling in 16nm. VLSI Circuits 2019: 300- - [i1]Makena Low, Priyanka Raina:
Automating Vitiligo Skin Lesion Segmentation Using Convolutional Neural Networks. CoRR abs/1912.08350 (2019) - 2018
- [b1]Priyanka Raina:
Energy-efficient circuits and systems for computational imaging and vision on mobile devices. Massachusetts Institute of Technology, Cambridge, USA, 2018 - 2017
- [j3]Priyanka Raina, Mehul Tikekar, Anantha P. Chandrakasan:
An Energy-Scalable Accelerator for Blind Image Deblurring. IEEE J. Solid State Circuits 52(7): 1849-1862 (2017) - 2016
- [c3]Priyanka Raina, Mehul Tikekar, Anantha P. Chandrakasan:
An energy-scalable accelerator for blind image deblurring. ESSCIRC 2016: 113-116 - [c2]Dongsuk Jeon, Nathan Ickes, Priyanka Raina, Hsueh-Cheng Wang, Daniela Rus, Anantha P. Chandrakasan:
24.1 A 0.6V 8mW 3D vision processor for a navigation device for the visually impaired. ISSCC 2016: 416-417 - 2014
- [j2]Rahul Rithe, Priyanka Raina, Nathan Ickes, Srikanth V. Tenneti, Anantha P. Chandrakasan:
Correction to "Reconfigurable Processor for Energy-Efficient Computational Photography". IEEE J. Solid State Circuits 49(11): 2740 (2014) - 2013
- [j1]Rahul Rithe, Priyanka Raina, Nathan Ickes, Srikanth V. Tenneti, Anantha P. Chandrakasan:
Reconfigurable Processor for Energy-Efficient Computational Photography. IEEE J. Solid State Circuits 48(11): 2908-2919 (2013) - [c1]Rahul Rithe, Priyanka Raina, Nathan Ickes, Srikanth V. Tenneti, Anantha P. Chandrakasan:
Reconfigurable processor for energy-scalable computational photography. ISSCC 2013: 164-165
Coauthor Index
Mark Horowitz
aka: Mark A. Horowitz
aka: Mark A. Horowitz
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