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Journal Articles
- 2008
[j1]Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner:
Transmission Gates Combined With Level-Restoring CMOS Gates Reduce Glitches in Low-Power Low-Frequency Multipliers. IEEE Trans. Very Large Scale Integr. Syst. 16(7): 830-836 (2008)
Conference and Workshop Papers
- 2007
- [c7]Flavio Carbognani, Simon Haene, Manuel Arrigo, Claudio Pagnamenta, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner:
A 0.25 μm 0.92 mW per Mb/s Viterbi decoder featuring resonant clocking for ultra-low-power 54 Mb/s WLAN communication. CICC 2007: 451-454 - [c6]Marc Simon Wegmueller, Martin Hediger, Thomas Kaufmann, Felix Bürgin, Wolfgang Fichtner:
Wireless Implant Communications for Biomedical Monitoring Sensor Network. ISCAS 2007: 809-812 - 2006
- [c5]Felix Bürgin, Flavio Carbognani, Martin Hediger, Hektor Meier, Robert Meyer-Piening, Rafael Santschi, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner:
Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm. DAC 2006: 558-561 - [c4]Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner:
Two-phase resonant clocking for ultra-low-power hearing aid applications. DATE 2006: 73-78 - [c3]Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner:
42% power savings through glitch-reducing clocking strategy in a hearing aid application. ISCAS 2006 - 2005
- [c2]Flavio Carbognani, Felix Bürgin, Luca Henzen, Herbert Koch, Hovig Magdassian, Christoph Pedretti, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner:
A 0.67-mm2 45-μW DSP VLSI implementation of an adaptive directional microphone for hearing aids. ECCTD 2005: 141-144 - [c1]Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner:
Two-Phase Clocking and a New Latch Design for Low-Power Portable Applications. PATMOS 2005: 446-455
Coauthor Index
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