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ORCIDAntonio García 0001
Person information
- affiliation: University of Granada, Granada, Spain
Other persons with the same name
- Antonio García — disambiguation page
- Antonio García 0002
![[0000-0002-2956-733X]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0002-2956-733X")
— UAM-Iztapalapa, Iztapalapa, Mexico - Antonio García 0003 — University of Alcal'á, Alcalá de Henares, Spain
- Antonio García 0004 — Technical University of Valencia, Valencia, Spain
- Antonio García 0005 — King Juan Carlos University, Madrid, Spain
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Books and Theses
- 2021
[b1]Antonio Lloris Ruiz, Encarnación Castillo Morales, Luís Parrilla Roure, Antonio García Ríos, María José Lloris Meseguer:
Arithmetic and Algebraic Circuits. Intelligent Systems Reference Library 201, Springer 2021, ISBN 978-3-030-67265-2, pp. 1-565
Journal Articles
- 2024
- [j24]Alberto Martín-Martín, Rubén Padial-Allué, Encarnación Castillo, Luis Parrilla, Ignacio Parellada-Serrano, Alejandro Morán, Antonio García:
Hardware Implementations of a Deep Learning Approach to Optimal Configuration of Reconfigurable Intelligence Surfaces. Sensors 24(3): 899 (2024) - 2023
- [j23]Luis Parrilla, Antonio García, Encarnación Castillo, Juan Antonio López Ramos, Uwe Meyer-Baese:
Revisiting Multiple Ring Oscillator-Based True Random Generators to Achieve Compact Implementations on FPGAs for Cryptographic Applications. Cryptogr. 7(2): 26 (2023) - 2022
- [j22]Luis Parrilla, Antonio Lloris, Encarnación Castillo, Antonio García:
Table-Free Seed Generation for Hardware Newton-Raphson Square Root and Inverse Square Root Implementations in IoT Devices. IEEE Internet Things J. 9(9): 6985-6995 (2022) - 2020
- [j21]Víctor Toral, Encarnación Castillo, Andreas Albretch, Francisco J. Romero, Antonio García, Noel Rodriguez, Paolo Lugli, Diego Pedro Morales, Almudena Rivadeneyra:
Cost-Effective Printed Electrodes Based on Emerging Materials Applied to Biosignal Acquisition. IEEE Access 8: 127789-127800 (2020) - 2019
- [j20]Víctor Toral, Antonio García, Francisco J. Romero, Diego Pedro Morales, Encarnación Castillo, Luís Parrilla Roure, Francisco M. Gómez-Campos, Antonio Morillas, Alejandro Sánchez:
Wearable System for Biosignal Acquisition and Monitoring Based on Reconfigurable Technologies. Sensors 19(7): 1590 (2019) - [j19]Luís Parrilla Roure, José Antonio Álvarez-Bermejo, Encarnación Castillo, Juan Antonio López-Ramos, Diego Pedro Morales, Antonio García:
Elliptic Curve Cryptography hardware accelerator for high-performance secure servers. J. Supercomput. 75(3): 1107-1122 (2019) - 2018
- [j18]Luís Parrilla Roure, Encarnación Castillo, Juan Antonio López Ramos, José Antonio Álvarez-Bermejo, Antonio García, Diego Pedro Morales:
Unified Compact ECC-AES Co-Processor with Group-Key Support for IoT Devices in Wireless Sensor Networks. Sensors 18(1): 251 (2018) - 2017
- [j17]Encarnación Castillo, Antonio Lloris-Ruíz, Diego Pedro Morales, Luis Parrilla, Antonio García, Guillermo Botella:
A new area-efficient BCD-digit multiplier. Digit. Signal Process. 62: 1-10 (2017) - 2016
- [j16]Encarnación Castillo, Antonio Lloris-Ruíz, Antonio García, Luis Parrilla, Diego Pedro Morales:
Comments on "Fast architecture for decimal digit multiplication". Microprocess. Microsystems 47: 441-444 (2016) - 2015
- [j15]Luis Parrilla, Encarnación Castillo, Elias Todorovich, Antonio García, Diego Pedro Morales, Guillermo Botella:
Improvements for the applicability of power-watermarking to embedded IP cores protection: e-coreIPP. Digit. Signal Process. 44: 110-122 (2015) - 2013
- [j14]Encarnación Castillo, Diego Pedro Morales, Guillermo Botella Juan, Antonio García, Luis Parrilla, Alberto J. Palma:
Efficient wavelet-based ECG processing for single-lead FHR extraction. Digit. Signal Process. 23(6): 1897-1909 (2013) - [j13]Encarnación Castillo, Diego Pedro Morales, Antonio García, Fernando Martínez-Martí, Luis Parrilla, Alberto J. Palma:
Noise Suppression in ECG Signals through Efficient One-Step Wavelet Processing Techniques. J. Appl. Math. 2013: 763903:1-763903:13 (2013) - 2012
- [j12]Antonio Martínez-Olmos, Guillermo Botella Juan, Encarnación Castillo, Diego Pedro Morales, Jesus Banqueri, Antonio García:
A reconstruction method for electrical capacitance tomography based on image fusion techniques. Digit. Signal Process. 22(6): 885-893 (2012) - [j11]Guillermo Botella Juan, Uwe Meyer-Bäse, Antonio García, Manuel Rodríguez:
Quantization analysis and enhancement of a VLSI gradient-based motion estimation architecture. Digit. Signal Process. 22(6): 1174-1187 (2012) - [j10]Uwe Meyer-Bäse, Guillermo Botella Juan, Soumak Mookherjee, Encarnación Castillo, Antonio García:
Energy optimization of Application-Specific Instruction-Set Processors by using hardware accelerators in semicustom ICs technology. Microprocess. Microsystems 36(2): 127-137 (2012) - 2010
- [j9]Guillermo Botella Juan, Antonio García Ríos, M. Rodriguez-Alvarez, Eduardo Ros Vidal, Uwe Meyer-Bäse, María C. Molina:
Robust Bioinspired Architecture for Optical-Flow Computation. IEEE Trans. Very Large Scale Integr. Syst. 18(4): 616-629 (2010) - 2008
- [j8]Guillermo Botella Juan, Manuel Rodríguez, Antonio García, Eduardo Ros:
Neuromorphic Configurable Architecture for Robust Motion Estimation. Int. J. Reconfigurable Comput. 2008: 428265:1-428265:9 (2008) - 2007
- [j7]Encarnación Castillo, Uwe Meyer-Bäse, Antonio García, Luis Parrilla, Antonio Lloris-Ruíz:
IPP@HDL: Efficient Intellectual Property Protection Scheme for IP Cores. IEEE Trans. Very Large Scale Integr. Syst. 15(5): 578-591 (2007) - 2005
- [j6]Javier Ramírez, Uwe Meyer-Bäse, Antonio García:
Efficient Rns-based Design of Programmable Fir Filters Targeting Fpl Technology. J. Circuits Syst. Comput. 14(1): 165-177 (2005) - 2003
- [j5]Javier Ramírez, Antonio García:
A Fast QRNS-Based Algorithm for the DCT and Its Field-Programmable Logic Implementation. J. Circuits Syst. Comput. 12(1): 111- (2003) - [j4]Javier Ramírez, Antonio García, Uwe Meyer-Bäse, Fred J. Taylor, Antonio Lloris-Ruíz:
Implementation of RNS-Based Distributed Arithmetic Discrete Wavelet Transform Architectures Using Field-Programmable Logic. J. VLSI Signal Process. 33(1-2): 171-190 (2003) - [j3]Javier Ramírez, Uwe Meyer-Bäse, Fred J. Taylor, Antonio García, Antonio Lloris-Ruíz:
Design and Implementation of High-Performance RNS Wavelet Processors Using Custom IC Technologies. J. VLSI Signal Process. 34(3): 227-237 (2003) - 2001
- [j2]Uwe Meyer-Bäse, Antonio García, Fred J. Taylor:
Implementation of a Communications Channelizer using FPGAs and RNS Arithmetic. J. VLSI Signal Process. 28(1-2): 115-128 (2001) - 1999
- [j1]Antonio García, Antonio Lloris-Ruíz:
A Look-Up Scheme for Scaling in the RNS. IEEE Trans. Computers 48(7): 748-751 (1999)
Conference and Workshop Papers
- 2024
- [c28]Luís Parrilla Roure, Pablo Rodríguez-Iturriaga, Juan Antonio López-Villanueva, Salvador Rodríguez-Bolívar, Encarnación Castillo, Antonio García:
Towards efficient hardware digital twins of lithium-ion batteries. DCIS 2024: 1-6 - 2021
- [c27]Luis Oyarzún, Encarnación Castillo, Luis Parrilla, Antonio García:
Window Polarization in PCA-based Analysis of Non-Invasive Fetal ECG recordings. DCIS 2021: 1-6 - 2020
- [c26]Luis Parrilla, Encarnación Castillo, Antonio García:
Privacy-enabled system based on Elliptic Curve Cryptography to reduce risks of contagion in pandemics. DCIS 2020: 1-6 - 2019
- [c25]Luís Parrilla Roure, Ahmed Mohamed Bellemou, Antonio García, Encarnación Castillo:
Efficient Elliptic Curve Cryptoprocessor for enabling TLS protocol in low-cost reconfigurable SoCs. DCIS 2019: 1-5 - 2017
- [c24]Pedro Álvarez, Francisco J. Romero, Antonio García, Luis Parrilla, Encarnación Castillo, Diego Pedro Morales:
Classification Algorithms for Fetal QRS Extraction in Abdominal ECG Signals. IWBBIO (1) 2017: 524-535 - 2013
- [c23]Encarnación Castillo, Diego Pedro Morales, Antonio García, Luis Parrilla, Nuria López-Ruiz, Alberto J. Palma:
One-step wavelet-based processing for wandering and noise removing in ECG signals. IWBBIO 2013: 491-498 - 2009
- [c22]Guillermo Botella Juan, Uwe Meyer-Bäse, Antonio García Ríos, Luís Parrilla Roure:
Improved gradient-based motion estimation on reconfigurable platforms. ERSA 2009: 315-318 - [c21]Guillermo Botella Juan, Antonio García Ríos, Uwe Meyer-Bäse, Manuel Rodríguez, María C. Molina, Luís Parrilla Roure:
Enhanced gradient-based motion vector coprocessor. FPL 2009: 687-690 - 2008
- [c20]Diego Pedro Morales, Antonio García, Alberto J. Palma, Miguel Ángel Carvajal, Encarnación Castillo, Luis F. Capitán-Vallvey:
Enhancing ADC resolution through Field Programmable Analog Array dynamic reconfiguration. FPL 2008: 635-638 - 2007
- [c19]Encarnación Castillo, Luis Parrilla, Antonio García, Uwe Meyer-Bäse, Antonio Lloris-Ruíz:
Intellectual Property Protection of HDL IP Cores Through Automated Sognature Hosting. FPL 2007: 183-188 - [c18]Diego Pedro Morales, Antonio García, Alberto J. Palma, Antonio Martínez-Olmos, Encarnación Castillo:
Exploiting Analog and Digital Reconfiguration for Smart Sensor Interfacing. FPL 2007: 706-709 - 2006
- [c17]Encarnación Castillo, Luis Parrilla, Antonio García, Antonio Lloris-Ruíz, Uwe Meyer-Bäse:
IPP Watermarking Technique for IP Core Protection on FPL Devices. FPL 2006: 1-6 - 2005
- [c16]Antonio García, Javier Ramírez, Uwe Meyer-Bäse, Encarnación Castillo, Antonio Lloris-Ruíz:
Efficient Embedded FPL Resource Usage for RNS-based Polyphase DWT Filter Banks. FPL 2005: 531-534 - [c15]Daniel González, Luis Parrilla, Antonio García, Encarnación Castillo, Antonio Lloris-Ruíz:
Efficient Clock Distribution Scheme for VLSI RNS-Enabled Controllers. PATMOS 2005: 657-665 - 2004
- [c14]Uwe Meyer-Bäse, Suhasini Rao, Javier Ramírez, Antonio García:
Area*Time Optimized Hogenauer Channelizer Design Using FPL Devices. FPL 2004: 384-393 - [c13]Luis Parrilla, Encarnación Castillo, Antonio García, Antonio Lloris-Ruíz:
Intellectual Property Protection for RNS Circuits on FPGAs. FPL 2004: 1139-1141 - 2003
- [c12]Javier Ramírez, Uwe Meyer-Bäse, Antonio García, Antonio Lloris-Ruíz:
Design and Implementation of RNS-Based Adaptive Filters. FPL 2003: 1135-1138 - 2002
- [c11]Javier Ramírez, Antonio García:
U. Meyer-Baese, A. Lloris: Fast RNS FPL-based Communications Receiver Design and Implementation. FPL 2002: 472-481 - [c10]Uwe Meyer-Bäse, Javier Ramírez, Antonio García:
Low Power High Speed Algebraic Integer Frequency Sampling Filters Using FPLDs. FPL 2002: 897-904 - [c9]Daniel González, Antonio García, Graham A. Jullien, Javier Ramírez, Luis Parrilla, Antonio Lloris-Ruíz:
A New Methodology for Efficient Synchronization of RNS-Based VLSI Systems. PATMOS 2002: 188-197 - 2001
- [c8]Javier Ramírez, Antonio García, Uwe Meyer-Bäse, Fred J. Taylor, Pedro G. Fernández, Antonio Lloris-Ruíz:
Design of RNS-based distributed arithmetic DWT filterbanks. ICASSP 2001: 1193-1196 - [c7]Pedro G. Fernández, Javier Ramírez, Antonio García, Luis Parrilla, Antonio Lloris-Ruíz:
Implementation of the one dimensional discrete cosine transform using the residue number system. ICECS 2001: 433-436 - 2000
- [c6]Javier Ramírez, Antonio García, Pedro G. Fernández, Antonio Lloris-Ruíz:
An efficient RNS architecture for the computation of discrete wavelet transforms on programmable devices. EUSIPCO 2000: 1-4 - [c5]Javier Ramírez, Antonio García, Pedro G. Fernández, Luis Parrilla, Antonio Lloris-Ruíz:
Analysis of RNS-FPL Synergy for High Throughput DSP Applications: Discrete Wavelet Transform. FPL 2000: 342-351 - [c4]Javier Ramírez Perez de Inestrosa, Antonio García, Pedro G. Fernández, Luis Parrilla, Antonio Lloris-Ruíz:
A new architecture to compute the discrete cosine transform using the quadratic residue number system. ISCAS 2000: 321-324 - 1999
- [c3]Antonio García, Uwe Meyer-Bäse, Antonio Lloris-Ruíz, Fred J. Taylor:
RNS implementation of FIR filters based on distributed arithmetic using field-programmable logic. ISCAS (1) 1999: 486-489 - 1998
- [c2]Antonio García, Uwe Meyer-Baese, Fred J. Taylor:
Pipelined Hogenauer CIC filters using field-programmable logic and residue number system. ICASSP 1998: 3085-3088 - [c1]Antonio García, Antonio Lloris-Ruíz:
Pipelined RNS multipliers: an application to scaling. ICECS 1998: 55-58
Coauthor Index
aka: Encarnación Castillo Morales
aka: Guillermo Botella
aka: Uwe Meyer-Baese
aka: Javier Ramírez Perez de Inestrosa
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