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Michael Schaffner
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Publications
- 2020
- [c21]Dionysios Diamantopoulos, Florian Scheidegger, Stefan Mach, Fabian Schuiki, Germain Haugou, Michael Schaffner, Frank K. Gürkaynak, Christoph Hagleitner, A. Cristiano I. Malossi, Luca Benini:
XwattPilot: A Full-stack Cloud System Enabling Agile Development of Transprecision Software for Low-power SoCs. COOL CHIPS 2020: 1-3 - 2019
- [j7]Fabian Schuiki, Michael Schaffner, Frank K. Gürkaynak, Luca Benini:
A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets. IEEE Trans. Computers 68(4): 484-497 (2019) - 2018
- [i4]Fabian Schuiki, Michael Schaffner, Frank K. Gürkaynak, Luca Benini:
A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets. CoRR abs/1803.04783 (2018) - 2017
- [j3]Michael Gautschi, Michael Schaffner, Frank K. Gürkaynak, Luca Benini:
An Extended Shared Logarithmic Unit for Nonlinear Function Kernel Acceleration in a 65-nm CMOS Multicore Cluster. IEEE J. Solid State Circuits 52(1): 98-112 (2017) - 2016
- [j2]Michael Schaffner, Frank K. Gürkaynak, Pierre Greisen, Hubert Kaeslin, Luca Benini, Aljosa Smolic:
Hybrid ASIC/FPGA System for Fully Automatic Stereo-to-Multiview Conversion Using IDW. IEEE Trans. Circuits Syst. Video Technol. 26(11): 2093-2108 (2016) - [c13]Michael Schaffner, Michael Gautschi, Frank K. Gürkaynak, Luca Benini:
Accuracy and Performance Trade-Offs of Logarithmic Number Units in Multi-Core Clusters. ARITH 2016: 95-103 - [c12]Youri Popoff, Florian Scheidegger, Michael Schaffner, Michael Gautschi, Frank K. Gürkaynak, Luca Benini:
High-efficiency logarithmic number unit design based on an improved cotransformation scheme. DATE 2016: 1387-1392 - [c11]Michael Gautschi, Michael Schaffner, Frank K. Gürkaynak, Luca Benini:
4.6 A 65nm CMOS 6.4-to-29.2pJ/FLOP@0.8V shared logarithmic floating point unit for acceleration of nonlinear function kernels in a tightly coupled processor cluster. ISSCC 2016: 82-83 - 2015
- [c10]Michael Schaffner, Frank K. Gürkaynak, Aljoscha Smolic, Luca Benini:
DRAM or no-DRAM?: exploring linear solver architectures for image domain warping in 28 nm CMOS. DATE 2015: 707-712 - [c9]Michael Schaffner, Frank K. Gürkaynak, Hubert Kaeslin, Luca Benini, Aljosa Smolic:
Automatic multiview synthesis - Towards a mobile system on a chip. VCIP 2015: 1-4 - [c8]Michael Schaffner, Frank K. Gürkaynak, Hubert Kaeslin, Luca Benini, Aljosa Smolic:
Automatic multiview synthesis - Prototype demo. VCIP 2015: 1 - 2014
- [c7]Michael Schaffner, Frank K. Gürkaynak, Aljoscha Smolic, Hubert Kaeslin, Luca Benini:
An Approximate Computing Technique for Reducing the Complexity of a Direct-Solver for Sparse Linear Systems in Real-Time Video Processing. DAC 2014: 132:1-132:6 - 2013
- [c6]Michael Schaffner, Pierre Greisen, Simon Heinzle, Frank K. Gürkaynak, Hubert Kaeslin, Aljoscha Smolic:
MADmax: A 1080p stereo-to-multiview rendering ASIC in 65 nm CMOS based on image domain warping. ESSCIRC 2013: 61-64 - [c4]Michael Schaffner, Pascal Hager, Lukas Cavigelli, Pierre Greisen, Frank K. Gürkaynak, Hubert Kaeslin:
A real-time 720p feature extraction core based on Semantic Kernels Binarized. VLSI-SoC 2013: 27-32 - [c3]Michael Schaffner, Pascal A. Hager, Lukas Cavigelli, Z. Fang, Pierre Greisen, Frank K. Gürkaynak, Aljoscha Smolic, Hubert Kaeslin, Luca Benini:
A Complete Real-Time Feature Extraction and Matching System Based on Semantic Kernels Binarized. VLSI-SoC (Selected Papers) 2013: 144-167 - 2012
- [c2]Pierre Greisen, Michael Schaffner, Danny Luu, Val Mikos, Simon Heinzle, Frank K. Gürkaynak, Aljoscha Smolic:
Spatially-Varying Image Warping: Evaluations and VLSI Implementations. VLSI-SoC (Selected Papers) 2012: 64-87 - [c1]Pierre Greisen, Richard Emler, Michael Schaffner, Simon Heinzle, Frank K. Gürkaynak:
A general-transformation EWA view rendering engine for 1080p video in 130 nm CMOS. VLSI-SoC 2012: 105-110
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