IEEE Transactions on Computers, Volume 28

Volume 28, Number 1, January 1979

• 
  David Nassimi, Sartaj Sahni:
  Bitonic Sort on a Mesh-Connected Parallel Computer. 2-7
• 
  Ashok K. Chandra, C. K. Wong:
  The Movement and Permutation of Columns in Magnetic Bubble Lattice Files. 8-15
• 
  John A. McPherson, Charles R. Kime:
  A Two-Level Diagnostic Model for Digital Systems. 16-27
• 
  Kwok-Tung Fung, Hwa C. Torng:
  On the Analysis of Memory Conflicts and Bus Contentions in a Multiple-Microprocessor System. 28-37
• 
  Alan Jay Smith:
  An Analytic and Experimental Study of Multiple Channel Controllers. 38-49

Correspondence

• 
  Vinod K. Agarwal, Gerald M. Masson:
  A Functional Form Approach to Test Set Coverage in Tree Networks. 50-52
• 
  Y. Zisapel, M. Krieger, J. Kella:
  Detection of Hazards in Combinational Switching Circuits. 52-56
• 
  H. Joel Trussell, Bobby R. Hunt:
  Improved Methods of Maximum a Posteriori Restoration. 57-62
• 
  Brian R. Gaines:
  Maryanski's Grammatical Inferencer. 62-64
• 
  Fred J. Maryanski, Taylor L. Booth:
  Authors' Reply. 64
• 
  Erkki Oja:
  On the Construction of Projectors Using Products of Elementary Matrices. 65-66
• 
  Tsutomu Sasao, Kozo Kinoshita:
  On the Number of Fanout-Free Functions and Unate Cascade Functions. 66-72
• 
  Mordechai Ben-Ari:
  On Transposing Large 2ⁿ × 2ⁿ Matrices. 72-75
• 
  Jay Niel Culliney, Ming Huei Young, Tomoyasu Nakagawa, Saburo Muroga:
  Results of the Synthesis of Optimal Networks of AND and OR Gates for Four-Variable Switching Functions. 76-85
• 
  R. David, R. Tellez-Giron:
  Comments on "The Error Latency of a Fault in a Sequential Digital Circuit". 85-86

Volume 28, Number 2, February 1979

• 
  Alexis C. Arvillias, Dimitris G. Maritsas:
  Toggle-Registers Generating in Parallel k kth Decimations of m-Sequences x^p + x^k + 1 Design Tables. 89-101
• 
  Yaohan Chu:
  Architecture of a Hardware Data Interpreter. 101-109
• 
  Charles B. Silio Jr.:
  An Efficient Simplex Coverability Algorithm in E ² with Application to Stochastic Sequential Machines. 109-120
• 
  S. Karunanithi, Arthur D. Friedman:
  Analysis of Digital Systems Using a New Measure of System Diagnosis. 121-133
• 
  Malcolm C. Easton, Peter A. Franaszek:
  Use Bit Scanning in Replacement Decisions. 133-141

Correspondence

• 
  Heinrich Niemann, Jürgen Weiss:
  A Fast-Converging Algorithm for Nonlinear Mapping of High-Dimensional Data to a Plane. 142-147
• 
  David K. Cheng, James J. Liu:
  A Generalized Orthogonal Transformation Matriz. 147-150
• 
  Herbert Freeman:
  Algorithm for Generating a Digital Straight Line on a Triangular Grid. 150-152
• 
  Robert D. Braun, Donald D. Givone:
  An Improved Algorithm for Deriving Checking Experiments. 153-156
• 
  Adarshpal S. Sethi, Narsingh Deo:
  Interference in Multiprocessor Systems with Localized Memory Access Probabilities. 157-163
• 
  George K. Papakonstantinou:
  Minimization of Modulo-2 Sum of Products. 163-167
• 
  Constantinos Halatsis, Nikolaos Gaitanis:
  Positive Fail-Safe Realization of Synchronous Sequential Machines. 167-172
• 
  Raouf F. H. Farag:
  Word-Level Recognition of Cursive Script. 172-175

Volume 28, Number 3, March 1979

• 
  Janusz A. Brzozowski, Michael Yoeli:
  On a Ternary Model of Gate Networks. 178-184
• 
  I-Ngo Chen, Paul Y. Chen, Tse-Yun Feng:
  Associative Processing of Network Flow Problems. 184-190
• 
  B. Ramakrishna Rau:
  Program Behavior and the Performance of Interleaved Memories. 191-199
• 
  K. Wayne Current, Douglas A. Mow:
  Implementing Parallel Counters with Four-Valued Threshold Logic. 200-204
• 
  Paul W. Baker:
  The Solution of Differential Equations on Short-Word-Length Computing Devices. 205-214
• 
  Dharma P. Agrawal:
  High-Speed Arithmetic Arrays. 215-224
• 
  S. Brent Morris, Arthur Valliere III, Richard A. Wisniewski:
  Processes for Random and Sequential Accessing in Dynamic Memories. 225-237

Correspondence

• 
  Peter L. Hammer, Uri N. Peled, Moshe Asher Pollatschek:
  An Algorithm to Dualize a Regular Switching Function. 238-243
• 
  Sargur N. Srihari, Michael K. Ohanesian:
  An Efficient Algorithm for Determining Hadamard Sequency Vectors. 243-244
• 
  Israel Koren:
  Analysis of the Signal Reliability Measure and an Evaluation Procedure. 244-249
• 
  Martin Freeman:
  Aspects of the Upper Bounds of Finite Input-Memory and Finite Output-Memory Sequential Machines. 249-253
• 
  Ronald C. Devries:
  Comments on "A Readily Implemented Single-Error-Correcting Unit-Distance Counting Code". 253-255
• 
  Erik Paaske:
  Comments on "A New Random-Error-Correction Code". 255-257
• 
  John En:
  Autor's Reply. 257-258
• 
  Ravindra Nair:
  Comments on "An Optimal Algorithm for Testing Stuck-at Faults in Random Access Memories". 258-261
• 
  James E. Smith:
  Comments on "Redundancy Testing in Combinational Networks". 261-262
• 
  Prathima Agrawal, Melvin A. Breuer:
  Experiments with a Density Router for PC Cards. 262-267
• 
  Henry O. Kunz:
  On the Equivalence Between One-Dimensional Discrete Walsh-Hadamard and Multidimensional Discrete Fourier Transforms. 267-268
• 
  Israel Koren, Zvi Kohavi:
  On the Properties of Sensitized Paths. 268-269
• 
  J. S. Hill:
  Revision of the Buffer Length Derivation for a Modified E_k/D/1 Systems by Maritsas and Hartley. 269-273
• 
  Werner Fleischhammer, Osman Dörtok:
  The Anomalous Behavior of Flip-Flops in Synchronizer Circuits. 273-276
• 
  Michel Diaz, Pierre Azéma, Jean-Michel Ayache:
  Unified Design of Self-Checking and Fail-Safe Combinational Circuits and Sequential Machines. 276-281

Volume 28, Number 4, April 1979

• 
  R. Peter Dube:
  Preliminary Specification of Spline Curves. 286-290
• 
  Gururaj S. Rao, Harold S. Stone, T. C. Hu:
  Assignment of Task in a Distributed Processor System with Limited Memory. 291-299

Correspondence

• 
  Iiro Hartimo, Leo Ojala:
  Comments on "A Stable, Two-Multiplies-per-Cycle Algorithm for Digital Generation of Sinusoids in Real Time". 300
• 
  Kai Hwang:
  Global and Modular Two's Complement Cellular Array Multipliers. 300-306
• 
  Vason P. Srini:
  Iterative Realization of Multivalued Logic Systems. 306-310
• 
  Jean-Loup Baer, Barbara Koyama:
  On the Minimization of the Width of the Control Memory of Microprogammed Processors. 330-316
• 
  Edward L. Robertson:
  Microcode Bit Optimizations is N P-Complete. 316-319
• 
  Claudine Turcat, André Verdillon:
  Symmetry, Automorphism, and Test. 319-325
• 
  O. Yenersoy:
  Synthesis of Asynchronous Machines Using Minxed-Operation Mode. 325-329

Volume 28, Number 5, May 1979

• 
  Alvin M. Despain:
  Very Fast Fourier Transform Algorithms Hardware for Implementation. 333-341
• 
  F. Gail Gray, Lionel C. C. Shih, Richard A. Thompson:
  Diagnosis of Faults in Modular Trees. 342-353
• 
  Yuan-Chieh Chow, Walter H. Kohler:
  Models for Dynamic Load Balancing in a Heterogeneous Multiple Processor System. 354-361

Correspondence

• 
  P. Ciompi, Luca Simoncini:
  Analysis and Optimal Design of Self-Diagnosable Systems with Repair. 362-365
• 
  Douglas Stott Parker Jr.:
  Combinatorial Merging and Huffman's Algorithm. 365-367
• 
  Wolfgang Coy:
  On the Design of Easily Testable Iterative Systems of Combinational Cells. 367-371
• 
  Teruo Hikita, Hajime Enomoto:
  On the Number of Multivalued Switching Functions Realizable by Cascades. 371-374
• 
  James E. Smith:
  Universal System Diagnosis Algorithms. 374-378

Volume 28, Number 6, June 1979

• 
  Glen G. Langdon Jr.:
  Database Machines: An Introduction. 381-383
• 
  Amar Mukhopadhyay:
  Hardware Algorithms for Nonnumeric Computation. 384-394
• 
  David J. DeWitt:
  DIRECT - A Multiprocessor Organization for Supporting Relational Database Management Systems. 395-406
• 
  Lee A. Hollaar:
  A Design for a List Merging Network. 406-413
• 
  Jayanta Banerjee, David K. Hsiao, Krishnamurthi Kannan:
  DBC - A Database Computer for Very Large Databases. 414-429
• 
  Stanley Y. W. Su, Le Huu Nguyen, Ahmed Emam, G. Jack Lipovski:
  The Architectural Features and Implementation Techniques of the Multicell CASSM. 430-445
• 
  Stewart A. Schuster, H. B. Nguyen, Esen A. Ozkarahan, Kenneth C. Smith:
  RAP.2 - An Associative Processor for Databases and Its Applications. 446-458

Volume 28, Number 7, July 1979

• 
  G. Robert Redinbo:
  Finite Field Arithmetic on an Array Processor. 461-471
• 
  Eduard Cerny, Daniel Mange, Eduardo Sanchez:
  Synthesis of Minimal Binary Decision Trees. 472-482
• 
  Frank Rubin:
  Decrypting a Stream Cipher Based on J-K Flop-Flops. 483-487
• 
  Irving S. Reed, Trieu-Kien Truong:
  A New Hybrid Algorithm for Computing a Fast Discrete Fourier Transform. 487-492
• 
  William K. S. Walker, Carl-Erik W. Sundberg, Colin J. Black:
  A Reliable Spaceborne Memory with a Single Error and Erasure Correction Scheme. 493-500
• 
  Kin-Man Chung, C. K. Wong:
  Asymtotically Optimal Interconnection Networks from Two-State Cells. 500-505
• 
  Maria-Ana Necula:
  An Algorithm for Fast Evaluation of Time Functions. 506-513
• 
  Israel Koren, Stephen Y. H. Su:
  Reliability Analysis of N-Modular Redundancy Systems with Intermittent and Permanent Faults. 514-520

Correspondence

• 
  H. Allen Curtis:
  Short-Cut Method of Deriving Nearly Optimal Arrays of NAND Trees. 521-528
• 
  Warren D. Little, Richard W. Heuft:
  An Area Shading Graphics Display Systems. 528-531
• 
  Alan Dunworth, H. V. Hartog:
  An Efficient State Minimization Algorithm for Some Special Classes of Incompletetly Specified Sequential Machines. 531-535
• 
  Kewal K. Saluja, E. H. Ong:
  Minimization of Reed-Muller Canonic Expansion. 535-537
• 
  Sam Toueg, Kenneth Steiglitz:
  The Design of Small-Diameter Networks by Local Search. 537-542
• 
  Robert Brian Cutler, Saburo Muroga:
  Comments on "Generalization of Consensus Theory and Application to the Minimization of Boolean Functions". 542-543

Volume 28, Number 8, August 1979

• 
  Edward J. McCluskey:
  Logic Design of Multivalued I²L Logic Circuits. 546-559
• 
  Graziano Frosini, Francesco M. Viterbo:
  An Algorithm for Evaluating the Frequency of a Rotating Vector. 560-566
• 
  Earl E. Swartzlander Jr., Douglas J. Heath:
  A Routing Algorithm for Signal Processing Networks. 567-572
• 
  Thomas S. Heines:
  Buffer Behavior in Computer Communication Systems. 573-576

Correspondence

• 
  Arthur R. Butz:
  FFT Length in Digital Filtering. 577-580
• 
  Paul B. Schneck:
  Comment on "When to Use Random Testing". 580-581
• 
  Vishwani D. Agrawal:
  Author's Reply. 581
• 
  Michael B. Feldman:
  An Application-Oriented Programming Language for Sequential Machine Studies. 582-586
• 
  Thaddeus Kobylarz, Atef Al-Najjar:
  An Examination of the Cost Function for Programmable Logic Arrays. 586-590

Volume 28, Number 9, September 1979

• 
  Suhas S. Patil, Terry A. Welch:
  A Programmable Logic Approach for VLSI. 594-601
• 
  Roy A. Wood:
  A High Density Programmable Logic Array Chip. 602-608
• 
  Yahiko Kambayashi:
  Logic Design of Programmable Logic Arrays. 609-617
• 
  Daniel L. Ostapko, Se June Hong:
  Fault Analysis and Test Generation for Programmable Logic Arrays (PLA's). 617-627
• 
  Share Young Lee, Hsu Chang:
  Associative-Search Bubble Devices for Content-Addressable Memory and Array Logic. 627-636
• 
  Heinrich Pangratz, Hans Weinrichter:
  Pseudo-Random Number Generator Based on Binary and Quinary Maximal-Length Sequences. 637-642
• 
  Jon Louis Bentley, Thomas Ottmann:
  Algorithms for Reporting and Counting Geometric Intersections. 643-647
• 
  Hung Chi Lai, Saburo Muroga:
  Minimum Parallel Binary Adders with NOR (NAND) Gates. 648-659
• 
  Utpal Banerjee, Shyh-Ching Chen, David J. Kuck, Ross A. Towle:
  Time and Parallel Processor Bounds for Fortran-Like Loops. 660-670
• 
  Joseph Y.-T. Leung, Edmund K. Lai:
  On Minimum Cost Recovery from System Deadlock. 671-677
• 
  B. Ramakrishna Rau:
  Interleaved Memory Bandwidth in a Model of a Muyltiprocessor Computer System. 678-681

Correspondence

• 
  Tsutomu Sasao, Kozo Kinoshita:
  Conservative Logic Elements and Their Universality. 682-685
• 
  Carl-Erik W. Sundberg:
  Properties of Transparent Shortened Codes for Memories With Stuck-at Faults. 686-690
• 
  Leslie Lamport:
  How to Make a Multiprocessor Computer That Correctly Executes Multiprocess Programs. 690-691
• 
  Vishwani D. Agrawal:
  Comments on "An Approach to Highly Integrated Computer-Maintained Cellular Arrays". 691-693
• 
  Earl E. Swartzlander Jr.:
  Comment on "The Focus Number System". 693
• 
  Samuel C. Lee, Albert D. Edgar:
  Addendum to "The Focus Number System". 693

Volume 28, Number 10, October 1979

• 
  Andrew Hopper, David J. Wheeler:
  Binary Routing Networks. 609-703
• 
  Steven I. Kartashev, Svetlana P. Kartashev:
  A Multicomputer System with Dynamic Architecture. 704-721
• 
  I-Ngo Chen, Robert Willoner:
  An 0(n) Parallel Multiplier with Bit-Sequential Input and Output. 721-727
• 
  Yasuhito Suenaga, Takahiko Kamae, Tomonori Kobayashi:
  A High-Speed Algorithm for the Generation of Straight Lines and Circular Arcs. 728-736
• 
  Erol Gelenbe, Kenneth C. Sevcik:
  Analysis of Update Synchronization for Multiple Copy Data Bases. 737-747
• 
  John B. Kam, George I. Davida:
  Structured Design of Substitution-Permutation Encryption Networks. 747-753
• 
  Charles R. Kime:
  An Abstract Model for Digital System Fault Diagnosis. 754-767
• 
  Keijiro Nakamura:
  Synthesis of Gate-Minimum Multi-Output Two-Level Negative Gate Networks. 768-772
• 
  Edmund A. Lamagna:
  The Complexity of Monotone Networks for Certain Bilinear Forms, Routing Problems, Sorting, and Merging. 773-782
• 
  Teofilo F. Gonzalez:
  A Note on Open Shop Preemptive Schedules. 782-786

Correspondence

• 
  Pramod K. Varshney:
  On Analytical Modeling of Intermittent Faults in Digital Systems. 786-791
• 
  K. G. Kulkarni, V. Jayakumar:
  Ordering of Connections for Automated Routing. 791-794
•