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Publication search results
found 29 matches
- 2024
- Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Jongjun Park, Hoi-Jun Yoo:
A Low-Power Artificial-Intelligence-Based 3-D Rendering Processor With Hybrid Deep Neural Network Computing. IEEE Micro 44(1): 17-27 (2024) - Jiacheng Cao, Wei Xiong, Jie Lu, Peilin Chen, Jian Wang, Jinmei Lai, Miaoqing Huang:
An optimized EEGNet processor for low-power and real-time EEG classification in wearable brain-computer interfaces. Microelectron. J. 145: 106134 (2024) - 2021
- Ming Liu, Ping Zhao, Tianshu Wu, Keshab K. Parhi, Xiaoyang Zeng, Yun Chen:
A low-power twiddle factor addressing architecture for split-radix FFT processor. Microelectron. J. 117: 105276 (2021) - 2020
- K. Parthiban, S. Sasikumar:
To implement positive feedback adiabatic logic (PFAL) - NAND technique on low power Zigbee applications for processor applications. Microprocess. Microsystems 76: 102856 (2020) - Mohamed El-Hadedy, Martin Margala, Sergiu Mosanu, Danilo Gligoroski, Jinjun Xiong, Wen-Mei Hwu:
Micro - GAGE: A Low-power Compact GAGE Hash Function Processor for IoT Applications. ICECS 2020: 1-4 - 2018
- Zhijian Chen, Huanzhang Xu, Jiahui Luo, Tao-Tao Zhu, Jianyi Meng:
Low-power perceptron model based ECG processor for premature ventricular contraction detection. Microprocess. Microsystems 59: 29-36 (2018) - Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori:
Bespoke Processors for Applications with Ultra-Low Area and Power Constraints. IEEE Micro 38(3): 32-39 (2018) - Chao Wang, Jianwen Luo, Jun Zhou:
A 1-V to 0.29-V sub-100-pJ/operation ultra-low power fast-convergence CORDIC processor in 0.18-μm CMOS. Microelectron. J. 76: 52-62 (2018) - Sriseshan Srikanth, Paul G. Rabbat, Eric R. Hein, Bobin Deng, Thomas M. Conte, Erik DeBenedictis, Jeanine E. Cook, Michael P. Frank:
Memory System Design for Ultra Low Power, Computationally Error Resilient Processor Microarchitectures. HPCA 2018: 696-709 - 2017
- Kyeongryeol Bong, Sungpill Choi, Changhyeon Kim, Hoi-Jun Yoo:
Low-Power Convolutional Neural Network Processor for a Face-Recognition System. IEEE Micro 37(6): 30-38 (2017) - David Brooks, John Sartori:
Ultra-Low-Power Processors. IEEE Micro 37(6): 16-19 (2017) - Lieven Eeckhout:
Moore's Law and Ultra-Low-Power Processors. IEEE Micro 37(6): 4-5 (2017) - 2016
- Youchang Kim, Injoon Hong, Junyoung Park, Hoi-Jun Yoo:
A 0.5 V 54 µW Ultra-Low-Power Object Matching Processor for Micro Air Vehicle Navigation. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(3): 359-369 (2016) - 2014
- Kanokwan Limnuson, Hui Lu, Hillel J. Chiel, Pedram Mohseni:
A bidirectional neural interface SoC with an integrated spike recorder, microstimulator, and low-power processor for real-time stimulus artifact rejection. CICC 2014: 1-4 - Tsung-Chuan Ma, Tung-Chien Chen, Liang-Gee Chen:
Design and implementation of a low power spike detection processor for 128-channel spike sorting microsystem. ICASSP 2014: 3889-3892 - 2013
- Krzysztof Marcinek, Witold A. Pleskacz:
ELEON3LP - Superscalar and low-power enhancements of single issue general purpose processor model. Microprocess. Microsystems 37(6-7): 693-700 (2013) - Sugako Otani, Naoshi Ishikawa, Hiroyuki Kondo:
RXv2 processor core for low-power microcontrollers. COOL Chips 2013: 1-3 - 2012
- David Burgess, Edmund Gieske, James Holt, Thomas Hoy, Gary Whisenhunt:
e6500: Freescale's Low-Power, High-Performance Multithreaded Embedded Processor. IEEE Micro 32(5): 26-36 (2012) - Jinwook Oh, Gyeonghoon Kim, Injoon Hong, Junyoung Park, Seungjin Lee, Joo-Young Kim, Jeong-Ho Woo, Hoi-Jun Yoo:
Low-Power, Real-Time Object-Recognition Processors for Mobile Vision Systems. IEEE Micro 32(6): 38-50 (2012) - 2011
- Hanhua Qian, Xiwei Huang, Hao Yu, Chip-Hong Chang:
Cyber-Physical Thermal Management of 3D Multi-Core Cache-Processor System with Microfluidic Cooling. J. Low Power Electron. 7(1): 110-121 (2011) - Brad Burgess, Brad Cohen, Marvin Denman, Jim Dundas, David Kaplan, Jeff Rupley:
Bobcat: AMD's Low-Power x86 Processor. IEEE Micro 31(2): 16-25 (2011) - Tomoya Suzuki, Hideki Yamada, Toshiyuki Yamagishi, Daisuke Takeda, Koji Horisaki, Tom Vander Aa, Toshio Fujisawa, Liesbet Van der Perre, Yasuo Unekawa:
High-Throughput, Low-Power Software-Defined Radio Using Reconfigurable Processors. IEEE Micro 31(6): 19-28 (2011) - 2007
- Linda E. M. Brackenbury, Wei Shao:
Lowering power in an experimental RISC processor. Microprocess. Microsystems 31(5): 360-368 (2007) - Tse-Yu Yeh:
Low-Power, High-Performance Architecture of the PWRficient Processor Family. IEEE Micro 27(2): 69-78 (2007) - 2005
- Toru Asano, Joel Silberman, Sang H. Dhong, Osamu Takahashi, Michael White, Scott R. Cottier, Takaaki Nakazato, Atsushi Kawasumi, Hiroshi Yoshihara:
Low-Power Design Approach of 11FO4 256-Kbyte Embedded SRAM for the Synergistic Processor Element of a Cell Processor. IEEE Micro 25(5): 30-38 (2005) - Daniel L. Stasiak, Rajat Chaudhry, Dennis Cox, Stephen D. Posluszny, James D. Warnock, Steve Weitzel, Dieter F. Wendel, Michael Wang:
Cell Processor Low-Power Design Methodology. IEEE Micro 25(6): 71-78 (2005) - 2004
- Peter Petrov, Alex Orailoglu:
Transforming Binary Code for Low-Power Embedded Processors. IEEE Micro 24(3): 21-33 (2004) - 1999
- Enric Musoll:
Predicting the Usefulness of a Block Result: A Micro-Architectural Technique for High-Performance Low-Power Processors. MICRO 1999: 238-247 - 1995
- Goutam Debnath, Kathy Debnath, Roshan Fernando:
The Pentium processor-90/100, microarchitecture and low power circuit design. VLSI Design 1995: 185-190
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retrieved on 2024-09-22 10:09 CEST from data curated by the dblp team
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