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Nachiket Kapre
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Publications
- 2023
- [c82]Zhuanhao Wu, Marat Bekmyrza, Nachiket Kapre, Hiren D. Patel:
Ditty: Directory-based Cache Coherence for Multicore Safety-critical Systems. DATE 2023: 1-6 - 2022
- [j12]Gurshaant Malik, Ian Elmor Lang, Rodolfo Pellizzoni, Nachiket Kapre:
HopliteML: Evolving Application Customized FPGA NoCs with Adaptable Routers and Regulators. ACM Trans. Reconfigurable Technol. Syst. 15(4): 40:1-40:33 (2022) - [c81]Srinirdheeshwar Kuttuva Prakash, Hiren D. Patel, Nachiket Kapre:
Managing HBM Bandwidth on Multi-Die FPGAs with FPGA Overlay NoCs. FCCM 2022: 1-9 - 2021
- [c79]Ian Elmor Lang, Nachiket Kapre, Rodolfo Pellizzoni:
Worst-case latency analysis for the versal NoC network packet switch. NOCS 2021: 55-60 - 2020
- [j11]Tushar Garg, Saud Wasly, Rodolfo Pellizzoni, Nachiket Kapre:
HopliteBuf: Network Calculus-Based Design of FPGA NoCs with Provably Stall-Free FIFOs. ACM Trans. Reconfigurable Technol. Syst. 13(2): 6:1-6:35 (2020) - [c78]Ian Elmor Lang, Ziqiang Huang, Nachiket Kapre:
Exploring The Impact Of Switch Arity On Butterfly Fat Tree Fpga Nocs. FCCM 2020: 70-74 - [c77]Gurshaant Malik, Ian Elmor Lang, Rodolfo Pellizzoni, Nachiket Kapre:
Learn the Switches: Evolving FPGA NoCs with Stall-Free and Backpressure Based Routers. FPL 2020: 18-25 - [c75]Gurshaant Singh Malik, Lucian Petrica, Nachiket Kapre, Michaela Blott:
DarwiNN: efficient distributed neuroevolution under communication constraints. GECCO Companion 2020: 141-142 - 2019
- [c73]Gurshaant Singh Malik, Nachiket Kapre:
Enhancing Butterfly Fat Tree NoCs for FPGAs with Lightweight Flow Control. FCCM 2019: 154-162 - [c72]Tushar Garg, Saud Wasly, Rodolfo Pellizzoni, Nachiket Kapre:
HopliteBuf: FPGA NoCs with Provably Stall-Free FIFOs. FPGA 2019: 222-231 - [c71]Gurshaant Singh Malik, Nachiket Kapre:
Enhancing Butterfly Fat Tree NoCs for FPGAs with Lightweight Flow Control. FPGA 2019: 308 - [c69]Ananda Samajdar, Tushar Garg, Tushar Krishna, Nachiket Kapre:
Scaling the Cascades: Interconnect-Aware FPGA Implementation of Machine Learning Problems. FPL 2019: 342-349 - [c68]Long Chung Chan, Gurshaant Malik, Nachiket Kapre:
Partitioning FPGA-Optimized Systolic Arrays for Fun and Profit. FPT 2019: 144-152 - 2018
- [j10]Gopalakrishna Hegde, Siddhartha, Nachiket Kapre:
CaffePresso: Accelerating Convolutional Networks on Embedded SoCs. ACM Trans. Embed. Comput. Syst. 17(1): 15:1-15:26 (2018) - [c67]Siddhartha, Nachiket Kapre:
Hoplite-Q: Priority-Aware Routing in FPGA Overlay NoCs. FCCM 2018: 17-24 - [c65]Nachiket Kapre, Tushar Krishna:
FastTrack: Exploiting Fast FPGA Wiring for Implementing NoC Shortcuts (Abstract Only). FPGA 2018: 286 - [c64]Benjamin Morcos, Terrence C. Stewart, Chris Eliasmith, Nachiket Kapre:
Implementing NEF Neural Networks on Embedded FPGAs. FPT 2018: 22-29 - [c63]Siddhartha, Nachiket Kapre:
DaCO: A High-Performance Token Dataflow Coprocessor Overlay for FPGAs. FPT 2018: 158-165 - [c62]Nachiket Kapre, Tushar Krishna:
FastTrack: Leveraging Heterogeneous FPGA Wires to Design Low-Cost High-Performance Soft NoCs. ISCA 2018: 739-751 - 2017
- [j8]Nachiket Kapre, Jan Gray:
Hoplite: A Deflection-Routed Directional Torus NoC for FPGAs. ACM Trans. Reconfigurable Technol. Syst. 10(2): 14:1-14:24 (2017) - [c61]Siddhartha, Nachiket Kapre:
eBSP: Managing NoC traffic for BSP workloads on the 16-core Adapteva Epiphany-III processor. DATE 2017: 73-78 - [c58]Chethan Kumar H. B, Prashant Ravi, Gourav Modi, Nachiket Kapre:
120-core microAptiv MIPS Overlay for the Terasic DE5-NET FPGA board. FPGA 2017: 141-146 - [c56]Kizheppatt Vipin, Jan Gray, Nachiket Kapre:
Enabling partial reconfiguration and low latency routing using segmented FPGA NoCs. FPL 2017: 1-8 - [c55]Saud Wasly, Rodolfo Pellizzoni, Nachiket Kapre:
HopliteRT: An efficient FPGA NoC for real-time applications. FPT 2017: 64-71 - [c54]Nachiket Kapre, Hiren D. Patel:
Applying Models of Computation to OpenCL Pipes for FPGA Computing. IWOCL 2017: 9:1-9:4 - [i1]Siddhartha, Nachiket Kapre:
Out-of-Order Dataflow Scheduling for FPGA Overlays. CoRR abs/1705.02734 (2017) - 2016
- [c53]Gopalakrishna Hegde, Siddhartha, Nachiappan Ramasamy, Nachiket Kapre:
CaffePresso: an optimized library for deep learning on embedded accelerator-based platforms. CASES 2016: 14:1-14:10 - [c52]Prashant Ravi, Uma Syam, Nachiket Kapre:
Preventive Detection of Mosquito Populations using Embedded Machine Learning on Low Power IoT Platforms. ACM DEV 2016: 3:1-3:10 - [c51]Gopalakrishna Hegde, Siddhartha, Nachiappan Ramasamy, Vamsi Buddha, Nachiket Kapre:
Evaluating Embedded FPGA Accelerators for Deep Learning Applications. FCCM 2016: 25 - [c50]Nachiket Kapre, Siddhartha:
Communication Optimization for the 16-Core Epiphany Floating-Point Processor Array. FCCM 2016: 26 - [c43]Nachiket Kapre, Samuel Bayliss:
Survey of domain-specific languages for FPGA computing. FPL 2016: 1-12 - [c42]Sidharth Maheshwari, Gourav Modi, Siddhartha, Nachiket Kapre:
Vector FPGA acceleration of 1-D DWT computations using sparse matrix skeletons. FPL 2016: 1-4 - 2015
- [j6]Nachiket Kapre, Pradeep Moorthy:
A Case for Embedded FPGA-based SoCs in Energy-Efficient Acceleration of Graph Problems. Supercomput. Front. Innov. 2(3): 76-86 (2015) - [j5]Abid Rafique, George A. Constantinides, Nachiket Kapre:
Communication Optimization of Iterative Sparse Matrix-Vector Multiply on GPUs and FPGAs. IEEE Trans. Parallel Distributed Syst. 26(1): 24-34 (2015) - [c34]Pradeep Moorthy, Nachiket Kapre:
Zedwulf: Power-Performance Tradeoffs of a 32-Node Zynq SoC Cluster. FCCM 2015: 68-75 - [c33]Gopalakrishna Hegde, Nachiket Kapre:
Energy-Efficient Acceleration of OpenCV Saliency Computation Using Soft Vector Processors. FCCM 2015: 76-83 - [c30]Hui Yan Cheah, Suhaib A. Fahmy, Nachiket Kapre:
On Data Forwarding in Deeply Pipelined Soft Processors. FPGA 2015: 181-189 - [c29]Siddhartha, Nachiket Kapre:
FPGA Acceleration of Irregular Iterative Computations using Criticality-Aware Dataflow Optimizations (Abstract Only). FPGA 2015: 277 - [c28]Nachiket Kapre, Jan Gray:
Hoplite: Building austere overlay NoCs for FPGAs. FPL 2015: 1-8 - [c26]Nachiket Kapre, Han Jianglei, Andrew Bean, Pradeep Moorthy, Siddhartha:
GraphMMU: Memory Management Unit for Sparse Graph Accelerators. IPDPS Workshops 2015: 113-120 - [c24]Andrew Bean, Nachiket Kapre, Peter Y. K. Cheung:
G-DMA: improving memory access performance for hardware accelerated sparse graph computation. ReConFig 2015: 1-6 - 2014
- [c23]Siddhartha, Nachiket Kapre:
Breaking Sequential Dependencies in FPGA-Based Sparse LU Factorization. FCCM 2014: 60-63 - [c22]Edward A. Stott, Joshua M. Levine, Peter Y. K. Cheung, Nachiket Kapre:
Timing Fault Detection in FPGA-Based Circuits. FCCM 2014: 96-99 - [c19]Siddhartha, Nachiket Kapre:
Heterogeneous dataflow architectures for FPGA-based sparse LU factorization. FPL 2014: 1-4 - [c18]Hui Yan Cheah, Suhaib A. Fahmy, Nachiket Kapre:
Analysis and optimization of a deeply pipelined FPGA soft processor. FPT 2014: 235-238 - [c17]Siddhartha, Nachiket Kapre:
Fanout decomposition dataflow optimizations for FPGA-based Sparse LU factorization. FPT 2014: 252-255 - 2013
- [c15]Abid Rafique, Nachiket Kapre, George A. Constantinides:
Application Composition and Communication Optimization in Iterative Solvers Using FPGAs. FCCM 2013: 153-160 - [c13]Kizheppatt Vipin, Shanker Shreejith, Dulitha Gunasekera, Suhaib A. Fahmy, Nachiket Kapre:
System-level FPGA device driver with high-level synthesis support. FPT 2013: 128-135 - 2012
- [c12]Abid Rafique, Nachiket Kapre, George A. Constantinides:
A High Throughput FPGA-Based Implementation of the Lanczos Method for the Symmetric Extremal Eigenvalue Problem. ARC 2012: 239-250 - [c10]Abid Rafique, Nachiket Kapre, George A. Constantinides:
Enhancing performance of Tall-Skinny QR factorization using FPGAs. FPL 2012: 443-450
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