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"120-core microAptiv MIPS Overlay for the Terasic DE5-NET FPGA board."
Chethan Kumar H. B et al. (2017)
- Chethan Kumar H. B, Prashant Ravi, Gourav Modi, Nachiket Kapre:
120-core microAptiv MIPS Overlay for the Terasic DE5-NET FPGA board. FPGA 2017: 141-146
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