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ORCIDARC 2012: Hong Kong, China
- Oliver C. S. Choy, Ray C. C. Cheung
, Peter M. Athanas, Kentaro Sano:
Reconfigurable Computing: Architectures, Tools and Applications - 8th International Symposium, ARC 2012, Hong Kong, China, March 19-23, 2012. Proceedings. Lecture Notes in Computer Science 7199, Springer 2012, ISBN 978-3-642-28364-2
Applied RC Design Methods and Tools
- Karel Heyse, Brahim Al Farisi, Karel Bruneel, Dirk Stroobandt:
Automating Reconfiguration Chain Generation for SRL-Based Run-Time Reconfiguration. 1-12 - Kizheppatt Vipin, Suhaib A. Fahmy:
Architecture-Aware Reconfiguration-Centric Floorplanning for Partial Reconfiguration. 13-25 - Luzhou Wang, Kentaro Sano, Satoru Yamamoto:
Domain-Specific Language and Compiler for Stencil Computation on FPGA-Based Systolic Computational-Memory Array. 26-39 - Yongjoo Kim, Jongeun Lee, Jinyong Lee, Toan X. Mai, Ingoo Heo, Yunheung Paek:
Exploiting Both Pipelining and Data Parallelism with SIMD Reconfigurable Architecture. 40-52 - Florent de Dinechin, Laurent-Stéphane Didier:
Table-Based Division by Small Integer Constants. 53-63 - Qiang Liu, Wayne Luk:
Heterogeneous Systems for Energy Efficient Scientific Computing. 64-75 - Sayyed Arash Ostadzadeh, Roel Meeuws, Imran Ashraf, Carlo Galuzzi, Koen Bertels:
The Q2 Profiling Framework: Driving Application Mapping for Heterogeneous Reconfigurable Platforms. 76-88
Applied RC Architectures
- Tassadaq Hussain, Muhammad Shafiq, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé:
PPMC: A Programmable Pattern Based Memory Controller. 89-101 - Fakhar Anjam, Quan Kong, Roel Seedorf, Stephan Wong:
A Run-Time Task Migration Scheme for an Adjustable Issue-Slots Multi-core Processor. 102-113 - Geoffrey Ndu, Jim D. Garside:
Boosting Single Thread Performance in Mobile Processors via Reconfigurable Acceleration. 114-125 - Gang Zhou, Li Li, Harald Michalik:
Complexity Analysis of Finite Field Digit Serial Multipliers on FPGAs. 126-137 - Shinya Takamaeda-Yamazaki, Shintaro Sano, Yoshito Sakaguchi, Naoki Fujieda, Kenji Kise:
ScalableCore System: A Scalable Many-Core Simulator by Employing over 100 FPGAs. 138-150 - Sen Ma, Miaoqing Huang, Eugene Cartwright, David Andrews:
Scalable Memory Hierarchies for Embedded Manycore Systems. 151-162 - Takahiro Watanabe, Minoru Watanabe:
Triple Module Redundancy of a Laser Array Driver Circuit for Optically Reconfigurable Gate Arrays. 163-173 - Wei Ting Loke, Yajun Ha:
A Routing Architecture for FPGAs with Dual-VT Switch Box and Logic Clusters. 174-186
Applied RC Applications
- Qiwei Jin, Diwei Dong, Anson H. T. Tse, Gary Chun Tak Chow, David B. Thomas, Wayne Luk, Stephen Weston:
Multi-level Customisation Framework for Curve Based Monte Carlo Financial Simulations. 187-201 - Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura:
A Low-Cost and High-Performance Virus Scanning Engine Using a Binary CAM Emulator and an MPU. 202-214 - Mohamad Sofian Abu Talip, Takayuki Akamine, Yasunori Osana, Naoyuki Fujita, Hideharu Amano:
Cost Effective Implementation of Flux Limiter Functions Using Partial Reconfiguration. 215-226 - Grigorios Mingas, Christos-Savvas Bouganis:
Parallel Tempering MCMC Acceleration Using Reconfigurable Hardware. 227-238 - Abid Rafique, Nachiket Kapre, George A. Constantinides:
A High Throughput FPGA-Based Implementation of the Lanczos Method for the Symmetric Extremal Eigenvalue Problem. 239-250 - Anson H. T. Tse, Gary C. T. Chow, Qiwei Jin, David B. Thomas, Wayne Luk:
Optimising Performance of Quadrature Methods with Reduced Precision. 251-263
Critical Issues in Applied RC
- Markus Weinhardt:
Teaching Hardware/Software Codesign on a Reconfigurable Computing Platform. 264-275 - Tim Güneysu, Igor L. Markov, André Weimerskirch:
Securely Sealing Multi-FPGA Systems. 276-289 - Xuan You Tan, David Boland, George A. Constantinides:
FPGA Paranoia: Testing Numerical Properties of FPGA Floating Point IP-Cores. 290-301 - Manish Kumar Jaiswal, Ray C. C. Cheung:
High Performance Reconfigurable Architecture for Double Precision Floating Point Division. 302-313
Posters
- Tannous Frangieh, Richard Stroop, Peter Athanas, Teresa Cervero:
A Modular-Based Assembly Framework for Autonomous Reconfigurable Systems. 314-319 - Yarkin Doröz, Erkay Savas:
Constructing Cluster of Simple FPGA Boards for Cryptologic Computations. 320-328 - Annie Avakian, Natwar Agrawal, Ranga Vemuri:
Reconfigurable Multicore Architecture for Dynamic Processor Reallocation. 329-334 - Stewart Denholm, Kuen Hung Tsoi, Peter R. Pietzuch, Wayne Luk:
Efficient Communication for FPGA Clusters. 335-341 - Ehsan Zadkhosh, Sepide Fatahi, Mahmood Ahmadi:
Performance Analysis of Reconfigurable Processors Using MVA Analysis. 342-349 - Ruining He, Guoqiang Liang, Yuchun Ma, Yu Wang, Jinian Bian:
PDPR: Fine-Grained Placement for Dynamic Partially Reconfigurable FPGAs. 350-356 - Elias Vansteenkiste, Karel Bruneel, Dirk Stroobandt:
A Connection Router for the Dynamic Reconfiguration of FPGAs. 357-364 - Hongbing Fan, Yue-Ang Chen, Yu-Liang Wu:
R-NoC: An Efficient Packet-Switched Reconfigurable Networks-on-Chip. 365-371 - Kashif Latif, M. Muzaffar Rao, Athar Mahboob, Arshad Aziz:
Novel Arithmetic Architecture for High Performance Implementation of SHA-3 Finalist Keccak on FPGA Platforms. 372-378 - Chao Wang, Xi Li, Xuehai Zhou, Xiaojing Feng:
CRAIS: A Crossbar Based Adaptive Interconnection Scheme. 379-384
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