22. FTCS 1992: Boston, Massachusetts, USA
Digest of Papers: FTCS-22, The Twenty-Second Annual International Symposium on Fault-Tolerant Computing, Boston, Massachusetts, USA, July 8-10, 1992. IEEE Computer Society 1992 ISBN 0-8186-2875-8
Panel: State-of-the-Practice in Fault Tolerance
Architecture
- G. Robert Redinbo: Protecting Processing Elements in Communication Satellites. 8-17
- Marc Chérèque, David Powell, Philippe Reynier, Jean-Luc Richier, Jacques Voiron: Active Replication in Delta-4. 28-37
- Lisa Spainhower, Jack Isenberg, Ram Chillarege, Joseph Berding: Design for Fault-Tolerance in System ES/9000 Model 900. 38-47
Recovery
- Pankaj Jalote: Dynamic Reconfiguration of CSP Programs for Fault Tolerance. 50-56
- Ramesh Karri, Alex Orailoglu: Scheduling with Rollback Constraints in High-Level Synthesis of Self-Recovering ASICs. 519-526
- Junsheng Long, W. Kent Fuchs, Jacob A. Abraham: Compiler-Assisted Static Checkpoint Insertion. 58-65
- Neal J. Alewine, Shyh-Kwei Chen, Chung-Chi Jim Li, W. Kent Fuchs, Wen-mei W. Hwu: Branch Recovery with Compiler-Assisted Multiple Instruction Retry. 66-73
Communication Protocols
- Yair Amir, Danny Dolev, Shlomo Kramer, Dalia Malki: Transis: A Communication Subsystem for High Availability. 76-84
- Paulo Veríssimo, Luís Rodrigues: A posteriori Agreement for Fault-Tolerant Clock Synchronization on Broadcast Networks. 527-536
- Qin Zheng, Kang G. Shin: Fault-Tolerant Real-Time Communication in Distributed Computing Systems. 86-93
Self-Checking and Diagnosis
- Takashi Nanya, Shin'ichi Hatakenaka, Ryuichi Onoo: Design of Fully Exercised SFS/SCD Logic Networks. 96-103
- Jien-Chung Lo, James C. Daly, Michael Nicolaidis: Design of Static CMOS Self-Checking Circuits using Built-In Current Sensing. 104-111
- Mark G. Karpovsky, Saeed M. Chaudhry, Lev B. Levitin: Multiple Signature Analysis: A Framework for Built-In Self-Diagnostic. 112-119
Modelling and Simulation
- Dov Bulka, Joanne Bechta Dugan: Design and Analysis of Multibus Systems Using Projective Geometry. 122-129
- Victor F. Nicola, Philip Heidelberger, Perwez Shahabuddin: Uniformization and Exponential Transformation: Techniques for Fast Simulation of Highly Dependable Non-Markovian Systems. 130-139
- Sandeep Juneja, Perwez Shahabuddin: Fast Simulation of Markovian Reliability/Availability Models with General Repair Policies. 150-159
Fault-Tolerant Hypercubes and Meshes
- Jehoshua Bruck, Robert Cypher, Ching-Tien Ho: Efficient Fault-Tolerant Mesh and Hypercube Architectures. 162-169
- C. S. Raghavendra, Pei-Ji Yang, Sing-Ban Tien: Free Dimensions - An Effective Approach to Achieving Fault Tolerance in Hypercubes. 170-177
- Shahram Latifi, Si-Qing Zheng, Nader Bagherzadeh: Optimal Ring Embedding in Hypercubes with Faulty Links. 178-184
Scheduling and Fault Classification
- Dar-Tzen Peng: Performance Bounds in List Scheduling of Redundant Tasks on Multi-Processors. 196-203
- Yi-Min Wang, W. Kent Fuchs: Scheduling Message Processing for Reducing Rollback Propagation. 204-211
- Neeraj Suri, M. M. Hugue, Chris J. Walter: Reliability Modeling of Large Fault-Tolerant Systems. 212-220
Test Pattern Generation
- Irith Pomeranz, Sudhakar M. Reddy: A Divide-And-Conquer Approach to Test Generation for Large Synchronous Sequential Circuits. 230-237
- Mandyam-Komar Srinivas, James Jacob, Vishwani D. Agrawal: Finite State Machine Testing Based on Growth and Dissappearance Faults. 238-245
- Takayuki Fujino, Hideo Fujiwara: An Efficient Test Generation Algorithm Based on Search State Dominance. 246-253
- Seiji Kajihara, Haruko Shiba, Kozo Kinoshita: Removal of Redundancy in Logic Circuits under Classification of Undetectable Faults. 263-270
Synthesis for Testability and Fault Protection
- Ashutosh Mujumdar, Kewal K. Saluja, Rajiv Jain: Incorporating Testability Considerations in High-Level Systhesis. 272-279
- Niraj K. Jha, Irith Pomeranz, Sudhakar M. Reddy, Robert J. Miller: Synthesis of Multi-Level Combinational Circuits for Complete Robust Path Delay Fault Testability. 280-287
- Alexandre Yakovlev: A Structural Technique For Fault-Protection in Asynchronous Interfaces. 288-295
Control Flow Checking
- Bernhard Eschermann: On Combining Off-Line BIST and On-Line Control Flow Checking. 298-305
- Scott H. Robinson, John Paul Shen: Direct Methods for Synthesis of Self-Monitoring State Machines. 306-315
- Joakim Ohlsson, Marcus Rimén, Ulf Gunneflo: A Study of the Effects of Transient Fault Injection into a 32-bit RISC with Built-in Watchdog. 316-325
Fault Injection
- Seyed Ghassem Miremadi, Johan Karlsson, Ulf Gunneflo, Jan Torin: Two Software Techniques for On-line Error Detection. 328-335
- Ghani A. Kanawati, Nasser A. Kanawati, Jacob A. Abraham: FERRARI: A Tool for The Validation of System Dependability Properties. 336-344
- Dimiter R. Avresky, Jean Arlat, Jean-Claude Laprie, Yves Crouzet: Fault Injection for the Formal Testing of Fault Tolerance. 345-354
Wafer Testing and Defect Tolerance
- Charles H. Stapper: A New Statistical Approach for Fault-Tolerant VLSI Systems. 356-365
- Kaiyuan Huang, Vinod K. Agarwal, Laurence E. LaForge: Wafer Testing with Pairwise Comparisons. 374-383
Fault Tolerance Theory
- David Powell: Failure Mode Assumptions and Assumption Coverage. 386-395
- Anish Arora, Mohamed G. Gouda: Closure and Convergence: A Formulation of Fault-Tolerant Computing. 396-403
- Behrooz Parhami: Optimal Algorithms for Exact, Inexact, and Approval Voting. 404-411
System Fault Detection and Reconfiguration
- Jamlung Sung, G. Robert Redinbo: Protecting Practical FFT Implementations that Share Common Processing Elements. 420-429
- Fikri T. Assaad, Shantanu Dutt: More Robust Tests in Algorithm-Based Fault-Tolerant Matrix Multiplication. 430-439
- Srinivasan Tridandapani, Arun K. Somani: Efficient Utilization of Spare Capacity for Fault Detection and Location in Multiprocessor Systems. 440-447
- Michael Peercy, Prithviraj Banerjee: Design and Analysis of Software Reconfiguration Strategies for Hypercube Multicomputers under Multiple Faults. 448-455
Field Experience
- Andrew L. Reibman: Outage Times in Fault-Tolerant Systems. 458-462
- Ann C. Merenda, Ed Merenda: Recovery/Serviceability System Test Improvements for the IBM ES/9000 520 Based Models. 463-467
- Robert P. Colwell: Latent Design Faults in the Development of Multiflow's TRACE/200. 468-474
- Mark Sullivan, Ram Chillarege: A Comparison of Software Defects in Database Management Systems and Operating Systems. 475-484
Error-Correcting Codes
- Eiji Fujiwara, Mitsuru Hamada: Single b-Bit Byte Error Correcting and Double Bit Error Detecting Codes for High-Speed Memory Systems. 494-501
- T. R. N. Rao, Gui Liang Feng, Mahadev S. Kolluru: Efficient Multiple Unidirectional Byte Error-Detecting Codes for Computer Memory Systems. 502-509
- Sulaiman Al-Bassam, Gowri Ramanathan, Bella Bose: Improved Construction Methods for Error Correcting Constant Weight Codes. 510-517
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