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Publication search results
found 143 matches
- 1986
- Magdy S. Abadir, Melvin A. Breuer:
Scan Path with Look Ahead Shifting (SPLASH). ITC 1986: 696-704 - M. Aghazadeh, M. Kirschner:
Transient Thermal Characteristics of VLSI Devices : Evaluation and Application. ITC 1986: 428-434 - Vishwani D. Agrawal, M. Ray Mercer:
Deterministic Versus Random Testing. ITC 1986: 718 - Sheldon B. Akers:
A Parity Bit Signature for Exhaustive Testing. ITC 1986: 48-53 - Larry Apfelbaum:
Improving In-Circuit Diagnosis of Analog Networks with Expert Systems Techniques. ITC 1986: 947-953 - Mark R. Barber, Walter I. Satre:
Timing Measurements on CMOS VLSI Devices Designed to Drive TTL Loads. ITC 1986: 161-168 - Barry Baril:
ASIC Verification: Second Generation Systems and Solutions. ITC 1986: 182-189 - Yehuda Baron:
Self Diagnostics on System Level by Design. ITC 1986: 921-929 - Zeev Barzilai, J. Lawrence Carter, Vijay S. Iyengar, Indira Nair, Barry K. Rosen, Joe D. Rutledge, Gabriel M. Silberman:
Efficient Fault Simulation of CMOS Circuits with Accurate Models. ITC 1986: 520-529 - Steve D. Bedrosian:
The Role of Pattern Recognition in VLSI Testing. ITC 1986: 750-755 - Harry Bleeker, D. van de Lagemaat:
Testing a Board Loaded with Leaded and Surface Mounted Components. ITC 1986: 317-321 - Arthur R. Braun:
Testing in the Data Communications Industries. ITC 1986: 10-11 - James D. Bray:
ATE Test Head Requirements for Low-Cost VLSI Testing. ITC 1986: 568-591 - A. J. Briers, K. A. E. Totton:
Random Pattern Testability by Fast Fault Simulation. ITC 1986: 274-281 - William C. Bruce, C. C. Hunter, L. A. Basto:
Testing Barrel Shifters in Microprocessors. ITC 1986: 145-153 - William W. Bust, Charles R. Darst, Gregory G. Krysl:
ABNER : A Burn-In Monitor and Error Reporting System for PBX Systems Test. ITC 1986: 65-73 - Sreejit Chakravarty, Harry B. Hunt III:
On the Computation of Detection Probability for Multiple Faults. ITC 1986: 252-262 - Hongtao P. Chang, William A. Rogers, Jacob A. Abraham:
Structured Functional Level Test Generation Using Binary Decision Diagrams. ITC 1986: 97-104 - Vladimir Cherkassky, Larry L. Kinney:
A Group Probing Strategy for Testing Large Number of Chips. ITC 1986: 853-856 - George Chiu, Jean-Mark Halbout:
Requirements and Trends for High Speed Testing. ITC 1986: 176-181 - Rihard S. Chomiczewski:
VIVED : A Visual Vector Editor. ITC 1986: 621-625 - Stephen A. Cohen:
A New Pin Electronics Architecture for High Performance Functional Module Testing. ITC 1986: 763-770 - David P. Cohoon, Jey Sheridan:
Case History of Networking a Wafer-Sort Area. ITC 1986: 84-89 - Stefano Concina, Gerald Liu, Len Lattanzi, Semyon Reyfman, Neil Richardson:
Software Integration in a Workstation-Based F-Beam Tester. ITC 1986: 644-651 - Mario Lúcio Côrtes, Edward J. McCluskey:
An Experiment on Intermittent-Failure Mechanisms. ITC 1986: 435-442 - Fred Cox, Lloyd K. Konneker, Douglas Moreland:
Visual Programming for Analog/Hybrid ATE. ITC 1986: 631-636 - Jesse G. Crane:
Testing the Sperry 36/72 Bit CMOS Micromainframe Chip Set. ITC 1986: 419-421 - Wilfried Daehn, Josef Gross:
A Test Generator IC for Testing Large CMOS-RAMs. ITC 1986: 18-24 - Earl Dalton, Walter Ahern, Stephen Denker, Ken Sweitzer, Bill Cooper, Tom Kelly, Stan Smith:
Systematic Yield Improvement in Board Testing Practice. ITC 1986: 80-83 - Wendell Damm, Pete Janowitz, Michael Hagen, YeeMay Shih, Glenn Widener:
Vernier Method for Calibration ot High-Speed Sampling System. ITC 1986: 220
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