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Publication search results
found 105 matches
- 2020
- Abhijit Das, Abhishek Kumar, John Jose, Maurizio Palesi:
Exploiting On-Chip Routers to Store Dirty Cache Blocks in Tiled Chip Multi-processors. ISVLSI 2020: 147-152 - Sukarn Agarwal, Hemangee K. Kapoor:
LiNoVo: Longevity Enhancement of Non-Volatile Last Level Caches in Chip Multiprocessors. ISVLSI 2020: 194-199 - Ahmad Alkhodair, Saraju P. Mohanty, Elias Kougianos, Deepak Puthal:
McPoRA: A Multi-chain Proof of Rapid Authentication for Post-Blockchain Based Security in Large Scale Complex Cyber-Physical Systems. ISVLSI 2020: 446-451 - Christos P. Antonopoulos, Georgios Keramidas, Vassilis Tsakanikas, Evi Faliagka, Christos Panagiotou, Nikolaos S. Voros:
Capacity Building Among European Stakeholders In the Areas of Cyber-Physical Systems, IoT & Embedded Systems: The SMART4ALL Digital Innovation Hub Perspective. ISVLSI 2020: 464-469 - Thomas Ayral, François-Marie Le Régent, Zain H. Saleem, Yuri Alexeev, Martin Suchara:
Quantum Divide and Compute: Hardware Demonstrations and Noisy Simulations. ISVLSI 2020: 138-140 - Suvadip Batabyal, Lovekush Sharma:
A Quantum Pipeline for an Executable Quantum Instruction Set Architecture. ISVLSI 2020: 294-299 - Biswajit Bhowmik, Santosh Biswas, Jatindra Kumar Deka, Bhargab B. Bhattacharya:
Locating Open-Channels in Octagon Networks on Chip-Microprocessors. ISVLSI 2020: 200-205 - Anthony Bisulco, Fernando Cladera Ojeda, Volkan Isler, Daniel Dongyuel Lee:
Near-Chip Dynamic Vision Filtering for Low-Bandwidth Pedestrian Detection. ISVLSI 2020: 234-239 - Michaela Brunner, Michael Gruber, Michael Tempelmeier, Georg Sigl:
Logic Locking Induced Fault Attacks. ISVLSI 2020: 114-119 - Nagadastagiri Challapalle, Makesh Chandran, Sahithi Rampalli, Vijaykrishnan Narayanan:
X-VS: Crossbar-Based Processing-in-Memory Architecture for Video Summarization. ISVLSI 2020: 592-597 - Subodha Charles, Prabhat Mishra:
Lightweight and Trust-Aware Routing in NoC-Based SoCs. ISVLSI 2020: 160-167 - Subodha Charles, Prabhat Mishra:
Securing Network-on-Chip Using Incremental Cryptography. ISVLSI 2020: 168-175 - Shao-I Chu, Chen-En Hsieh, Yi-Ming Lee, Sayed Ahmad Salehi:
Enhanced Architecture for Computing Polynomials Using Unipolar Stochastic Logic. ISVLSI 2020: 340-345 - Yuan-Dar Chung, Rung-Bin Lin:
Engineering a Standard Cell Library for an Industrial Router with ASAP7 PDK. ISVLSI 2020: 404-409 - Giovanni Amedeo Cirillo, Giovanna Turvani, Mario Simoni, Mariagrazia Graziano:
Advances in Molecular Quantum Computing: from Technological Modeling to Circuit Design. ISVLSI 2020: 132-137 - Ricardo Coelho, Felipe Tanus, Álvaro F. Moreira, Gabriel L. Nazar:
ACQuA: A Parallel Accelerator Architecture for Pure Functional Programs. ISVLSI 2020: 346-351 - Josie E. Rodriguez Condia, Marcio Gonçalves, José Rodrigo Azambuja, Matteo Sonza Reorda, Luca Sterpone:
Analyzing the Sensitivity of GPU Pipeline Registers to Single Events Upsets. ISVLSI 2020: 380-385 - Yuwen Cui, Shakthi Prabhakar, Hui Zhao, Saraju P. Mohanty, Juan Fang:
A Low-Cost Conflict-Free NoC Architecture for Heterogeneous Multicore Systems. ISVLSI 2020: 300-305 - Tyler Cultice, Carson Labrado, Himanshu Thapliyal:
A PUF Based CAN Security Framework. ISVLSI 2020: 602-603 - Tuhin Subhra Das, Navonil Chatterjee, Prasun Ghosal:
Regulating Degree of Adaptiveness for Performance-Centric NoC Routing. ISVLSI 2020: 542-547 - Suraj Dohar, Siddharth R. K., Vasantha M. H., Nithin Kumar Y. B.:
A Novel Single Event Upset Tolerant 12T Memory Cell for Aerospace Applications. ISVLSI 2020: 48-53 - Nourhan Elhamawy, Maël Gay, Ilia Polian:
An Open-Source Area-Optimized ECEG Cryptosystem in Hardware. ISVLSI 2020: 120-125 - Mahboube Fakhire, Ali Jahanian:
Vulnerability Analysis Against Fault Attack in terms of the Timing Behavior of Fault Injection. ISVLSI 2020: 374-379 - Juan Fang, Jiaxing Zhang, Shuaibing Lu, Hui Zhao:
Exploration on Task Scheduling Strategy for CPU-GPU Heterogeneous Computing System. ISVLSI 2020: 306-311 - Chenhui Feng, Hui Qian, Zhongfeng Wang:
An Implementation of Pre-Quantized Random Demodulator Based on Amplitude-to-Pulse Converter. ISVLSI 2020: 206-211 - Christoph Frisch, Michael Tempelmeier, Michael Pehl:
PAG-IoT: A PUF and AEAD Enabled Trusted Hardware Gateway for IoT Devices. ISVLSI 2020: 500-505 - Ioannis Galanis, Iraklis Anagnostopoulos, Chinh Nguyen, Guillermo Bares, Dona Burkard:
Inference and Energy Efficient Design of Deep Neural Networks for Embedded Devices. ISVLSI 2020: 36-41 - Lulu Ge, Keshab K. Parhi:
Molecular MUX-Based Physical Unclonable Functions. ISVLSI 2020: 482-487 - Christos Georgakidis, Christos P. Sotiriou, Nikolaos Sketopoulos, Milos Krstic, Oliver Schrape, Anselm Breitenreiter:
R-Abax: A Radiation Hardening Legalisation Algorithm Satisfying TMR Spacing Constraints. ISVLSI 2020: 316-321 - Mehran Goli, Rolf Drechsler:
Automated Design Understanding of SystemC-Based Virtual Prototypes: Data Extraction, Analysis and Visualization. ISVLSI 2020: 188-193
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